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Adds sufficient address decoding to print a more helpful exit message.
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@ -9,18 +9,24 @@
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#ifndef _526Implementation_h
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#define _526Implementation_h
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#include <cassert>
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#include <cstdio>
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namespace MOS {
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namespace MOS6526 {
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template <typename BusHandlerT, Personality personality>
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void MOS6526<BusHandlerT, personality>::write(int address, uint8_t value) {
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(void)address;
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(void)value;
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address &= 0xf;
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printf("Unhandled 6526 write: %02x to %d\n", value, address);
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assert(false);
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}
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template <typename BusHandlerT, Personality personality>
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uint8_t MOS6526<BusHandlerT, personality>::read(int address) {
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(void)address;
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address &= 0xf;
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printf("Unhandled 6526 read from %d\n", address);
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assert(false);
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return 0xff;
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}
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@ -29,8 +29,8 @@ class ConcreteMachine:
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public:
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ConcreteMachine(const Analyser::Static::Amiga::Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
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mc68000_(*this),
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cia1_(cia1_handler_),
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cia2_(cia2_handler_)
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cia_a_(cia_a_handler_),
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cia_b_(cia_b_handler_)
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{
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(void)target;
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@ -77,8 +77,8 @@ class ConcreteMachine:
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// (or at least enqueue them, JIT-wise).
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// Advance time.
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cia1_.run_for(cycle.length);
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cia2_.run_for(cycle.length);
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cia_a_.run_for(cycle.length);
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cia_b_.run_for(cycle.length);
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// Do nothing if no address is exposed.
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if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return HalfCycles(0);
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@ -88,15 +88,27 @@ class ConcreteMachine:
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// Grab the target address to pick a memory source.
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const uint32_t address = cycle.host_endian_byte_address();
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if(cycle.operation & (Microcycle::SelectByte | Microcycle::SelectWord)) {
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printf("%06x\n", address);
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printf("%06x\n", *cycle.address);
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}
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if(!regions_[address >> 18].read_write_mask) {
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if((cycle.operation & (Microcycle::SelectByte | Microcycle::SelectWord))) {
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// Check for various potential chip accesses.
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if(address >= 0xbf'd000 && address <= 0xbf'ef01) {
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printf("Unimplemented CIA %06x\n", address);
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assert(false);
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// CIA A is: 101x xxxx xx01 rrrr xxxx xxx0 (i.e. loaded into high byte)
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// CIA B is: 101x xxxx xx10 rrrr xxxx xxx1 (i.e. loaded into low byte)
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if((address & 0xe0'0000) == 0xa0'0000) {
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const int reg = address >> 8;
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if(cycle.operation & Microcycle::Read) {
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uint16_t result = 0xffff;
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if(address & 0x1000) result &= 0x00ff | (cia_a_.read(reg) << 8);
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if(address & 0x2000) result &= 0xff00 | (cia_b_.read(reg) << 0);
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cycle.set_value16(result);
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} else {
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if(address & 0x1000) cia_a_.write(reg, cycle.value8_high());
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if(address & 0x2000) cia_b_.write(reg, cycle.value8_low());
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}
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} else if(address >= 0xdf'f000 && address <= 0xdf'f1be) {
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printf("Unimplemented chipset access %06x\n", address);
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assert(false);
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@ -140,14 +152,14 @@ class ConcreteMachine:
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// MARK: - CIAs.
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struct CIA1Handler: public MOS::MOS6526::PortHandler {
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} cia1_handler_;
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struct CIAAHandler: public MOS::MOS6526::PortHandler {
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} cia_a_handler_;
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struct CIA2Handler: public MOS::MOS6526::PortHandler {
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} cia2_handler_;
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struct CIABHandler: public MOS::MOS6526::PortHandler {
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} cia_b_handler_;
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MOS::MOS6526::MOS6526<CIA1Handler, MOS::MOS6526::Personality::P8250> cia1_;
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MOS::MOS6526::MOS6526<CIA2Handler, MOS::MOS6526::Personality::P8250> cia2_;
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MOS::MOS6526::MOS6526<CIAAHandler, MOS::MOS6526::Personality::P8250> cia_a_;
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MOS::MOS6526::MOS6526<CIABHandler, MOS::MOS6526::Personality::P8250> cia_b_;
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// MARK: - MachineTypes::ScanProducer.
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