6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-06-25 18:30:07 +00:00
Code Issues Projects Releases Wiki Activity

Include fixed cost of rolls. Which includes providing slightly more information to did_shift.

Browse Source
This commit is contained in:
Thomas Harte 2022-06-01 20:30:51 -04:00
parent 0857dd0ae5
commit 659e4f6987
4 changed files with 22 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
InstructionSets/M68k/Implementation/PerformImplementation.hpp
View File

@ -828,14 +828,14 @@ template <
set_neg_zero(v, m); \
status.overflow_flag = (Status::FlagT(value) ^ status.zero_result) & Status::FlagT(m);
#define decode_shift_count() \
#define decode_shift_count(type) \
int shift_count = src.l & 63; \
flow_controller.did_shift(shift_count);
flow_controller.template did_shift<type>(shift_count);
#define set_flags_w(t) set_flags(src.w, 0x8000, t)
#define asl(destination, size) {\
decode_shift_count(); \
decode_shift_count(decltype(destination)); \
const auto value = destination; \
\
if(!shift_count) { \
@ -865,7 +865,7 @@ template <
case Operation::ASLl: asl(dest.l, 32); break;
#define asr(destination, size) {\
decode_shift_count(); \
decode_shift_count(decltype(destination)); \
const auto value = destination; \
\
if(!shift_count) { \
@ -909,7 +909,7 @@ template <
status.carry_flag = value & (t);
#define lsl(destination, size) {\
decode_shift_count(); \
decode_shift_count(decltype(destination)); \
const auto value = destination; \
\
if(!shift_count) { \
@ -933,7 +933,7 @@ template <
case Operation::LSLl: lsl(dest.l, 32); break;
#define lsr(destination, size) {\
decode_shift_count(); \
decode_shift_count(decltype(destination)); \
const auto value = destination; \
\
if(!shift_count) { \
@ -957,7 +957,7 @@ template <
case Operation::LSRl: lsr(dest.l, 32); break;
#define rol(destination, size) { \
decode_shift_count(); \
decode_shift_count(decltype(destination)); \
const auto value = destination; \
\
if(!shift_count) { \
@ -985,7 +985,7 @@ template <
case Operation::ROLl: rol(dest.l, 32); break;
#define ror(destination, size) { \
decode_shift_count(); \
decode_shift_count(decltype(destination)); \
const auto value = destination; \
\
if(!shift_count) { \
@ -1013,7 +1013,7 @@ template <
case Operation::RORl: ror(dest.l, 32); break;
#define roxl(destination, size) { \
decode_shift_count(); \
decode_shift_count(decltype(destination)); \
\
shift_count %= (size + 1); \
uint64_t compound = uint64_t(destination) | (status.extend_flag ? (1ull << size) : 0); \
@ -1037,7 +1037,7 @@ template <
case Operation::ROXLl: roxl(dest.l, 32); break;
#define roxr(destination, size) { \
decode_shift_count(); \
decode_shift_count(decltype(destination)); \
\
shift_count %= (size + 1); \
uint64_t compound = uint64_t(destination) | (status.extend_flag ? (1ull << size) : 0); \

7
InstructionSets/M68k/Perform.hpp
View File

@ -32,8 +32,11 @@ struct NullFlowController {
/// Indicates that a @c CHK was performed, along with whether the result @c was_under zero or @c was_over the source operand.
void did_chk([[maybe_unused]] bool was_under, [[maybe_unused]] bool was_over) {}
/// Indicates an in-register shift or roll occurred, providing the number of bits shifted by.
void did_shift([[maybe_unused]] int bit_count) {}
/// Indicates an in-register shift or roll occurred, providing the number of bits shifted by
/// and the type shifted.
///
/// @c IntT may be uint8_t, uint16_t or uint32_t.
template <typename IntT> void did_shift([[maybe_unused]] int bit_count) {}
/// Indicates that a @c DIVU was performed, providing the @c dividend and @c divisor.
/// If @c did_overflow is @c true then the divide ended in overflow.

8
Processors/68000Mk2/Implementation/68000Mk2Implementation.hpp
View File

@ -2649,8 +2649,12 @@ template <typename IntT> void ProcessorBase::did_muls(IntT multiplier) {
#undef convert_to_bit_count_16
void ProcessorBase::did_shift(int bits_shifted) {
dynamic_instruction_length_ = bits_shifted;
template <typename IntT> void ProcessorBase::did_shift(int bits_shifted) {
if constexpr (sizeof(IntT) == 4) {
dynamic_instruction_length_ = bits_shifted + 2;
} else {
dynamic_instruction_length_ = bits_shifted + 1;
}
}
template <bool use_current_instruction_pc> void ProcessorBase::raise_exception(int vector) {

2
Processors/68000Mk2/Implementation/68000Mk2Storage.hpp
View File

@ -148,7 +148,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
template <typename IntT> void did_muls(IntT);
inline void did_chk(bool, bool);
inline void did_scc(bool);
inline void did_shift(int);
template <typename IntT> void did_shift(int);
template <bool did_overflow> void did_divu(uint32_t, uint32_t);
template <bool did_overflow> void did_divs(int32_t, int32_t);
inline void did_bit_op(int);