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Rewire MOVEP.
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4a4e786060
commit
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@ -50,8 +50,7 @@ template <Model model, typename BusHandler> class Executor {
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void jsr(uint32_t offset);
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void link(uint32_t &address, uint32_t offset);
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void unlink(uint32_t &address);
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template <typename IntT> void movep_fromR(uint32_t reg, uint32_t address);
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template <typename IntT> void movep_toR(uint32_t ®, uint32_t address);
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template <typename IntT> void movep(Preinstruction instruction, uint32_t source, uint32_t dest);
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// TODO: ownership of this shouldn't be here.
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struct Registers {
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@ -395,38 +395,44 @@ void Executor<model, BusHandler>::unlink(uint32_t &address) {
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template <Model model, typename BusHandler>
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template <typename IntT>
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void Executor<model, BusHandler>::movep_fromR(uint32_t reg, uint32_t address) {
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if constexpr (sizeof(IntT) == 4) {
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bus_handler_.template write<uint8_t>(address, uint8_t(reg >> 24));
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void Executor<model, BusHandler>::movep(Preinstruction instruction, uint32_t source, uint32_t dest) {
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if(instruction.mode<0>() == AddressingMode::DataRegisterDirect) {
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const uint32_t reg = source;
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uint32_t address = dest;
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// Move register to memory.
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if constexpr (sizeof(IntT) == 4) {
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bus_handler_.template write<uint8_t>(address, uint8_t(reg >> 24));
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address += 2;
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bus_handler_.template write<uint8_t>(address, uint8_t(reg >> 16));
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address += 2;
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}
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bus_handler_.template write<uint8_t>(address, uint8_t(reg >> 8));
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address += 2;
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bus_handler_.template write<uint8_t>(address, uint8_t(reg >> 16));
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address += 2;
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}
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bus_handler_.template write<uint8_t>(address, uint8_t(reg >> 8));
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address += 2;
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bus_handler_.template write<uint8_t>(address, uint8_t(reg));
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}
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template <Model model, typename BusHandler>
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template <typename IntT>
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void Executor<model, BusHandler>::movep_toR(uint32_t ®, uint32_t address) {
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if constexpr (sizeof(IntT) == 4) {
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reg = bus_handler_.template read<uint8_t>(address) << 24;
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address += 2;
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reg |= bus_handler_.template read<uint8_t>(address) << 26;
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address += 2;
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bus_handler_.template write<uint8_t>(address, uint8_t(reg));
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} else {
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reg &= 0xffff0000;
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// Move memory to register.
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uint32_t ® = data_[instruction.reg<1>()].l;
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uint32_t address = source;
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if constexpr (sizeof(IntT) == 4) {
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reg = bus_handler_.template read<uint8_t>(address) << 24;
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address += 2;
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reg |= bus_handler_.template read<uint8_t>(address) << 26;
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address += 2;
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} else {
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reg &= 0xffff0000;
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}
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reg |= bus_handler_.template read<uint8_t>(address) << 8;
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address += 2;
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reg |= bus_handler_.template read<uint8_t>(address);
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}
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reg |= bus_handler_.template read<uint8_t>(address) << 8;
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address += 2;
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reg |= bus_handler_.template read<uint8_t>(address);
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}
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}
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@ -1177,19 +1177,11 @@ template <
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#undef set_neg_zero
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case Operation::MOVEPl:
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if(instruction.mode<0>() == AddressingMode::DataRegisterDirect) {
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flow_controller.template movep_fromR<uint16_t>(src.l, dest.l);
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} else {
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flow_controller.template movep_toR<uint16_t>(src.l, dest.l);
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}
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flow_controller.template movep<uint32_t>(instruction, src.l, dest.l);
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break;
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case Operation::MOVEPw:
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if(instruction.mode<0>() == AddressingMode::DataRegisterDirect) {
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flow_controller.template movep_fromR<uint32_t>(src.l, dest.l);
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} else {
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flow_controller.template movep_toR<uint32_t>(src.l, dest.l);
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}
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flow_controller.template movep<uint16_t>(instruction, src.l, dest.l);
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break;
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/*
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