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Pull unrecognised instruction handling into the usual switch table.
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@ -503,22 +503,6 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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MoveToStateSpecific(StandardException);
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}
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// Check for an unrecognised opcode.
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if(instruction_.operation == InstructionSet::M68k::Operation::Undefined) {
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switch(opcode_ & 0xf000) {
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default:
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exception_vector_ = InstructionSet::M68k::Exception::IllegalInstruction;
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break;
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case 0xa000:
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exception_vector_ = InstructionSet::M68k::Exception::Line1010;
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break;
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case 0xf000:
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exception_vector_ = InstructionSet::M68k::Exception::Line1111;
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break;
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}
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MoveToStateSpecific(StandardException);
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}
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// Ensure the first parameter is next fetched.
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next_operand_ = 0;
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@ -556,6 +540,22 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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#define SpecialCASE(x) case InstructionSet::M68k::Operation::x: MoveToStateSpecific(x)
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switch(instruction_.operation) {
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CASE(Undefined)
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if(instruction_.operation == InstructionSet::M68k::Operation::Undefined) {
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switch(opcode_ & 0xf000) {
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default:
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exception_vector_ = InstructionSet::M68k::Exception::IllegalInstruction;
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break;
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case 0xa000:
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exception_vector_ = InstructionSet::M68k::Exception::Line1010;
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break;
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case 0xf000:
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exception_vector_ = InstructionSet::M68k::Exception::Line1111;
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break;
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}
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MoveToStateSpecific(StandardException);
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}
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StdCASE(NBCD, {
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if(instruction_.mode(0) == Mode::DataRegisterDirect) {
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perform_state_ = Perform_np_n;
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