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Implements BIT (in regular and immediate forms).
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@ -33,15 +33,22 @@ struct LazyFlags {
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/// Contains Flag::Interrupt, complemented.
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/// Contains Flag::Interrupt, complemented.
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uint8_t inverse_interrupt = 0;
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uint8_t inverse_interrupt = 0;
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/// Sets N and Z flags per the 8-bit value @c value.
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void set_nz(uint8_t value) {
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void set_nz(uint8_t value) {
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zero_result = negative_result = value;
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zero_result = negative_result = value;
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}
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}
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/// Sets N and Z flags per the 8- or 16-bit value @c value; @c shift should be 0 to indicate an 8-bit value or 8 to indicate a 16-bit value.
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void set_nz(uint16_t value, int shift) {
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void set_nz(uint16_t value, int shift) {
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negative_result = uint8_t(value >> shift);
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negative_result = uint8_t(value >> shift);
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zero_result = uint8_t(value | (value >> shift));
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zero_result = uint8_t(value | (value >> shift));
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}
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}
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/// Sets the Z flag per the 8- or 16-bit value @c value; @c shift should be 0 to indicate an 8-bit value or 8 to indicate a 16-bit value.
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void set_z(uint16_t value, int shift) {
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zero_result = uint8_t(value | (value >> shift));
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}
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void set(uint8_t flags) {
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void set(uint8_t flags) {
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carry = flags & Flag::Carry;
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carry = flags & Flag::Carry;
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negative_result = flags & Flag::Sign;
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negative_result = flags & Flag::Sign;
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@ -508,6 +508,15 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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flags_.set_nz(a_.full, m_shift_);
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flags_.set_nz(a_.full, m_shift_);
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break;
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break;
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case BIT:
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flags_.set_nz(data_buffer_.value & a_.full, m_shift_);
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flags_.overflow = data_buffer_.value & Flag::Overflow;
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break;
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case BITimm:
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flags_.set_z(data_buffer_.value & a_.full, m_shift_);
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break;
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//
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//
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// Branches.
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// Branches.
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//
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//
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@ -586,7 +595,7 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
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#undef cp
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#undef cp
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// TODO:
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// TODO:
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// ADC, BIT, SBC,
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// ADC, SBC,
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// PLP,
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// PLP,
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// PHP, PHD, PHK,
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// PHP, PHD, PHK,
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// TRB, TSB,
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// TRB, TSB,
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@ -857,7 +857,7 @@ ProcessorStorage::ProcessorStorage() {
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/* 0x86 STX d */ op(direct, STX);
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/* 0x86 STX d */ op(direct, STX);
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/* 0x87 STA [d] */ op(direct_indirect_long, STA);
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/* 0x87 STA [d] */ op(direct_indirect_long, STA);
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/* 0x88 DEY i */ op(implied, DEY);
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/* 0x88 DEY i */ op(implied, DEY);
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/* 0x89 BIT # */ op(immediate, BIT);
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/* 0x89 BIT # */ op(immediate, BITimm);
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/* 0x8a TXA i */ op(implied, TXA);
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/* 0x8a TXA i */ op(implied, TXA);
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/* 0x8b PHB s */ op(stack_push, PHB);
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/* 0x8b PHB s */ op(stack_push, PHB);
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/* 0x8c STY a */ op(absolute, STY);
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/* 0x8c STY a */ op(absolute, STY);
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@ -137,7 +137,7 @@ enum MicroOp: uint8_t {
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enum Operation: uint8_t {
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enum Operation: uint8_t {
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// These perform the named operation using the value in the data buffer;
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// These perform the named operation using the value in the data buffer;
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// they are implicitly AccessType::Read.
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// they are implicitly AccessType::Read.
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ADC, AND, BIT, CMP, CPX, CPY, EOR, ORA, SBC,
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ADC, AND, BIT, CMP, CPX, CPY, EOR, ORA, SBC, BITimm,
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// These load the respective register from the data buffer;
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// These load the respective register from the data buffer;
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// they are implicitly AccessType::Read.
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// they are implicitly AccessType::Read.
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