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Implements BIT (in regular and immediate forms).

This commit is contained in:
Thomas Harte 2020-10-07 18:15:18 -04:00
parent 5ca1c0747f
commit 7439a326a6
4 changed files with 19 additions and 3 deletions

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@ -33,15 +33,22 @@ struct LazyFlags {
/// Contains Flag::Interrupt, complemented. /// Contains Flag::Interrupt, complemented.
uint8_t inverse_interrupt = 0; uint8_t inverse_interrupt = 0;
/// Sets N and Z flags per the 8-bit value @c value.
void set_nz(uint8_t value) { void set_nz(uint8_t value) {
zero_result = negative_result = value; zero_result = negative_result = value;
} }
/// Sets N and Z flags per the 8- or 16-bit value @c value; @c shift should be 0 to indicate an 8-bit value or 8 to indicate a 16-bit value.
void set_nz(uint16_t value, int shift) { void set_nz(uint16_t value, int shift) {
negative_result = uint8_t(value >> shift); negative_result = uint8_t(value >> shift);
zero_result = uint8_t(value | (value >> shift)); zero_result = uint8_t(value | (value >> shift));
} }
/// Sets the Z flag per the 8- or 16-bit value @c value; @c shift should be 0 to indicate an 8-bit value or 8 to indicate a 16-bit value.
void set_z(uint16_t value, int shift) {
zero_result = uint8_t(value | (value >> shift));
}
void set(uint8_t flags) { void set(uint8_t flags) {
carry = flags & Flag::Carry; carry = flags & Flag::Carry;
negative_result = flags & Flag::Sign; negative_result = flags & Flag::Sign;

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@ -508,6 +508,15 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
flags_.set_nz(a_.full, m_shift_); flags_.set_nz(a_.full, m_shift_);
break; break;
case BIT:
flags_.set_nz(data_buffer_.value & a_.full, m_shift_);
flags_.overflow = data_buffer_.value & Flag::Overflow;
break;
case BITimm:
flags_.set_z(data_buffer_.value & a_.full, m_shift_);
break;
// //
// Branches. // Branches.
// //
@ -586,7 +595,7 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
#undef cp #undef cp
// TODO: // TODO:
// ADC, BIT, SBC, // ADC, SBC,
// PLP, // PLP,
// PHP, PHD, PHK, // PHP, PHD, PHK,
// TRB, TSB, // TRB, TSB,

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@ -857,7 +857,7 @@ ProcessorStorage::ProcessorStorage() {
/* 0x86 STX d */ op(direct, STX); /* 0x86 STX d */ op(direct, STX);
/* 0x87 STA [d] */ op(direct_indirect_long, STA); /* 0x87 STA [d] */ op(direct_indirect_long, STA);
/* 0x88 DEY i */ op(implied, DEY); /* 0x88 DEY i */ op(implied, DEY);
/* 0x89 BIT # */ op(immediate, BIT); /* 0x89 BIT # */ op(immediate, BITimm);
/* 0x8a TXA i */ op(implied, TXA); /* 0x8a TXA i */ op(implied, TXA);
/* 0x8b PHB s */ op(stack_push, PHB); /* 0x8b PHB s */ op(stack_push, PHB);
/* 0x8c STY a */ op(absolute, STY); /* 0x8c STY a */ op(absolute, STY);

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@ -137,7 +137,7 @@ enum MicroOp: uint8_t {
enum Operation: uint8_t { enum Operation: uint8_t {
// These perform the named operation using the value in the data buffer; // These perform the named operation using the value in the data buffer;
// they are implicitly AccessType::Read. // they are implicitly AccessType::Read.
ADC, AND, BIT, CMP, CPX, CPY, EOR, ORA, SBC, ADC, AND, BIT, CMP, CPX, CPY, EOR, ORA, SBC, BITimm,
// These load the respective register from the data buffer; // These load the respective register from the data buffer;
// they are implicitly AccessType::Read. // they are implicitly AccessType::Read.