Implements altered direct indexed addressing in emulation mode.

Processors/6502/AllRAM/6502AllRAM.cpp

@@ -44,16 +44,16 @@ template <Type type> class ConcreteAllRAMProcessor: public AllRAMProcessor, publ
 			if(isReadOperation(operation)) {
 				*value = memory_[address];
 #ifdef BE_NOISY
-				if((address&0xff00) == 0x100) {
-					printf("%04x -> %02x\n", address, *value);
-				}
+//				if((address&0xff00) == 0x100) {
+//					printf("%04x -> %02x\n", address, *value);
+//				}
 #endif
 			} else {
 				memory_[address] = *value;
 #ifdef BE_NOISY
-				if((address&0xff00) == 0x100) {
-					printf("%04x <- %02x\n", address, *value);
-				}
+//				if((address&0xff00) == 0x100) {
+//					printf("%04x <- %02x\n", address, *value);
+//				}
 #endif
 			}
 

Processors/6502Esque/Implementation/LazyFlags.hpp

@@ -16,19 +16,19 @@ namespace MOS6502Esque {
 
 struct LazyFlags {
 	/// Bit 7 is set if the negative flag is set; otherwise it is clear.
-	uint8_t negative_result;
+	uint8_t negative_result = 0;
 
 	/// Non-zero if the zero flag is clear, zero if it is set.
-	uint8_t zero_result;
+	uint8_t zero_result = 0;
 
 	/// Contains Flag::Carry.
-	uint8_t carry;
+	uint8_t carry = 0;
 
 	/// Contains Flag::Decimal.
-	uint8_t decimal;
+	uint8_t decimal = 0;
 
 	/// Contains Flag::Overflow.
-	uint8_t overflow;
+	uint8_t overflow = 0;
 
 	/// Contains Flag::Interrupt, complemented.
 	uint8_t inverse_interrupt = 0;

Processors/65816/Implementation/65816Implementation.hpp

@@ -267,16 +267,22 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
 				data_address_ = instruction_buffer_.value;
 			continue;
 
-			case OperationConstructDirectX:
-				data_address_ = (instruction_buffer_.value + direct_ + x()) & 0xffff;
+			case OperationConstructDirectX: {
+				data_address_ = (
+					(direct_ & e_masks_[0]) +
+					((instruction_buffer_.value + direct_ + x()) & e_masks_[1])
+				) & 0xffff;
 				incorrect_data_address_ = (direct_ & 0xff00) + (data_address_ & 0x00ff);
 				if(!(direct_&0xff)) {
 					++next_op_;
 				}
-			continue;
+			} continue;
 
 			case OperationConstructDirectY:
-				data_address_ = (instruction_buffer_.value + direct_ + y()) & 0xffff;
+				data_address_ = (
+					(direct_ & e_masks_[0]) +
+					((instruction_buffer_.value + direct_ + y()) & e_masks_[1])
+				) & 0xffff;
 				// TODO: given the 16-bit internal arithmetic, confirm this is the correct spurious address.
 				incorrect_data_address_ = (direct_ & 0xff00) + (data_address_ & 0x00ff);
 				if(!(direct_&0xff)) {

Processors/65816/Implementation/65816Storage.cpp

@@ -723,6 +723,8 @@ struct CPU::WDC65816::ProcessorStorageConstructor {
 };
 
 ProcessorStorage::ProcessorStorage() {
+	a_.full = x_.full = y_.full = 0;	// TEMPORARY (?)
+
 	ProcessorStorageConstructor constructor(*this);
 
 	// Install the instructions.

Processors/65816/Implementation/65816Storage.hpp

@@ -237,6 +237,7 @@ struct ProcessorStorage {
 	uint8_t mx_flags_[2] = {1, 1};				// [0] = m; [1] = x. In both cases either `0` or `1`; `1` => 8-bit.
 	uint16_t m_masks_[2] = {0xff00, 0x00ff};	// [0] = src mask; [1] = dst mask.
 	uint16_t x_masks_[2] = {0xff00, 0x00ff};	// [0] = src mask; [1] = dst mask.
+	uint16_t e_masks_[2] = {0xff00, 0x00ff};
 	int m_shift_ = 0;
 	int x_shift_ = 0;
 	bool emulation_flag_ = true;