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mirror of https://github.com/TomHarte/CLK.git synced 2026-03-11 04:42:20 +00:00

Merge pull request #1617 from TomHarte/NoWarnings

Resolve x86-related build warnings plus various whitespace deficiencies.
This commit is contained in:
Thomas Harte
2025-10-29 12:16:53 -04:00
committed by GitHub
25 changed files with 83 additions and 73 deletions

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@@ -137,23 +137,23 @@ void WD1770::run_for(const Cycles cycles) {
void WD1770::posit_event(const int new_event_type) {
#define WAIT_FOR_EVENT(mask) { \
interesting_event_mask_ = int(mask); \
interesting_event_mask_ = int(mask); \
static constexpr int location = __COUNTER__ + 1; \
resume_point_ = location; \
return; \
resume_point_ = location; \
return; \
case location: \
(void)0; \
}
#define WAIT_FOR_TIME(ms) \
delay_time_ = ms * 8000; \
#define WAIT_FOR_TIME(ms) \
delay_time_ = ms * 8000; \
WAIT_FOR_EVENT(Event1770::Timer);
#define WAIT_FOR_BYTES(count) \
distance_into_section_ = 0; \
WAIT_FOR_EVENT(Event::Token); \
#define WAIT_FOR_BYTES(count) \
distance_into_section_ = 0; \
WAIT_FOR_EVENT(Event::Token); \
distance_into_section_ += get_latest_token().type == Token::Byte; \
if(distance_into_section_ < count) { \
if(distance_into_section_ < count) { \
RESUME_WAIT(Event::Token); \
}

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@@ -150,22 +150,22 @@ void i8272::posit_event(const int event_type) {
#define WAIT_FOR_EVENT(mask) { \
static constexpr int location = __COUNTER__ + 1; \
resume_point_ = location; \
interesting_event_mask_ = int(mask); \
return; \
resume_point_ = location; \
interesting_event_mask_ = int(mask); \
return; \
case location: \
(void)0; \
}
#define WAIT_FOR_TIME(ms) { \
static constexpr int location = __COUNTER__ + 1; \
interesting_event_mask_ = int(Event8272::Timer); \
delay_time_ = ms_to_cycles(ms); \
interesting_event_mask_ = int(Event8272::Timer); \
delay_time_ = ms_to_cycles(ms); \
is_sleeping_ = false; \
update_clocking_observer(); \
update_clocking_observer(); \
resume_point_ = location; \
[[fallthrough]]; \
case location: \
[[fallthrough]]; \
case location: \
if(delay_time_) return; \
}

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@@ -909,7 +909,7 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(
destination_ = source_ = memreg;
switch(reg) {
default: return undefined();
default: return undefined();
case 0: set(Operation::SLDT); break;
case 1: set(Operation::STR); break;
@@ -924,7 +924,7 @@ std::pair<int, typename Decoder<model>::InstructionT> Decoder<model>::decode(
destination_ = source_ = memreg;
switch(reg) {
default: return undefined();
default: return undefined();
case 0: set(Operation::SGDT); break;
case 1: set(Operation::SIDT); break;

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@@ -204,7 +204,7 @@ struct SegmentDescriptor {
/// Accesses must be `>= bounds().begin` and `<= bounds().end`.
DescriptorBounds bounds() const { return bounds_; }
bool present() const { return type_ & 0x80; }
bool present() const { return type_ & 0x80; }
int privilege_level() const { return (type_ >> 5) & 3; }
uint8_t access_rights() const { return uint8_t(type_); }

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@@ -290,7 +290,7 @@ void idiv(
FI;
ELSE (* quadword/doubleword operation *)
temp ← EDX:EAX / SRC; (* signed division *)
IF (temp > 7FFFFFFFH) OR (temp < 80000000H) (* if a positive result is greater than 7FFFFFFFH
IF (temp > 7FFFFFFFH) OR (temp < 80000000H) (* if a positive result is greater than 7FFFFFFFH
or a negative result is less than 80000000H *)
THEN #DE; (* divide error *) ;
ELSE

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@@ -450,8 +450,12 @@ template <
}
return;
case Operation::OUT: Primitive::out<IntT>(port(instruction.destination().source()), pair_low(), context); return;
case Operation::IN: Primitive::in<IntT>(port(instruction.source().source()), pair_low(), context); return;
case Operation::OUT:
Primitive::out<IntT>(port(instruction.destination().source()), pair_low(), context);
return;
case Operation::IN:
Primitive::in<IntT>(port(instruction.source().source()), pair_low(), context);
return;
case Operation::XLAT: Primitive::xlat<AddressT>(instruction, context); return;
@@ -746,7 +750,7 @@ requires is_context<ContextT>
void perform(
const Instruction<type> &instruction,
ContextT &context,
uint32_t source_ip
const ip_size_t<ContextT> source_ip
) {
if constexpr (uses_8086_exceptions(ContextT::model)) {
InstructionSet::x86::perform(
@@ -843,7 +847,7 @@ requires is_context<ContextT>
void fault(
const Exception exception,
ContextT &context,
const uint32_t source_ip
const ip_size_t<ContextT> source_ip
) {
if constexpr (uses_8086_exceptions(ContextT::model)) {
InstructionSet::x86::interrupt(

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@@ -299,10 +299,10 @@ void sal(
} else {
const auto mask = (Numeric::top_bit<IntT>() >> (count - 1));
context.flags.template set_from<Flag::Carry>(
destination & mask
destination & mask
);
context.flags.template set_from<Flag::Overflow>(IntT(
(destination ^ (destination << 1)) & mask
(destination ^ (destination << 1)) & mask
));
destination <<= count;
}

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@@ -250,6 +250,10 @@ concept is_context =
is_context_real<ContextT> &&
(!has_protected_mode<ContextT::model> || is_context_protected<ContextT>);
/// Gives the instruction pointer size for a given context.
template <typename ContextT>
using ip_size_t = std::conditional_t<has_32bit_instructions<ContextT::model>, uint32_t, uint16_t>;
/// Performs @c instruction querying @c registers and/or @c memory as required, using @c io for port input/output,
/// and providing any flow control effects to @c flow_controller.
///
@@ -259,7 +263,7 @@ template <
typename ContextT
>
requires is_context<ContextT>
void perform(const Instruction<type> &, ContextT &, uint32_t source_ip);
void perform(const Instruction<type> &, ContextT &, ip_size_t<ContextT> source_ip);
/// Performs an Exception, which includes those generated by external sources.
/// @c source_ip is unused if the exception is an instance of `Exception::interrupt` but is required for other internal faults.
@@ -267,7 +271,7 @@ template <
typename ContextT
>
requires is_context<ContextT>
void fault(Exception, ContextT &, const uint32_t source_ip = 0);
void fault(Exception, ContextT &, const ip_size_t<ContextT> source_ip = 0);
}

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@@ -127,8 +127,8 @@ public:
template <DescriptorTable table>
void set(const DescriptorTablePointer location) {
switch(table) {
case DescriptorTable::Local: local_ = location; break;
case DescriptorTable::Global: global_ = location; break;
case DescriptorTable::Local: local_ = location; break;
case DescriptorTable::Global: global_ = location; break;
case DescriptorTable::Interrupt: interrupt_ = location; break;
}
}

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@@ -43,8 +43,8 @@ enum class Key: uint16_t {
ForwardSlash = 0x68,
Bit1 = 0x08,
Right = 0x79, Left = 0x19, Down = 0x29, Up = 0x39,
Return = 0x49, Delete = 0x59, Copy = 0x69, Bit0 = 0x09,
Right = 0x79, Left = 0x19, Down = 0x29, Up = 0x39,
Return = 0x49, Delete = 0x59, Copy = 0x69, Bit0 = 0x09,
//
// Break; a key, but not on the keyboard matrix.
@@ -60,12 +60,12 @@ enum class Key: uint16_t {
//
// Master only keys.
//
Keypad4 = 0x7a, Keypad6 = 0x1a, Keypad8 = 0x2a, KeypadPlus = 0x3a,
KeypadDivide = 0x4a, KeypadHash = 0x5a, Keypad0 = 0x6a,
Keypad5 = 0x7b, Keypad7 = 0x1b, Keypad9 = 0x2b, KeypadMinus = 0x3b,
KeypadDeleted = 0x4b, KeypadMultiply = 0x5b, Keypad1 = 0x6b,
Keypad2 = 0x7c, F11 = 0x1c, PauseBreak = 0x2c, KeypadReturn = 0x3c,
KeypadDot = 0x4c, KeypadComma = 0x5c, Keypad3 = 0x6c,
Keypad4 = 0x7a, Keypad6 = 0x1a, Keypad8 = 0x2a, KeypadPlus = 0x3a,
KeypadDivide = 0x4a, KeypadHash = 0x5a, Keypad0 = 0x6a,
Keypad5 = 0x7b, Keypad7 = 0x1b, Keypad9 = 0x2b, KeypadMinus = 0x3b,
KeypadDeleted = 0x4b, KeypadMultiply = 0x5b, Keypad1 = 0x6b,
Keypad2 = 0x7c, F11 = 0x1c, PauseBreak = 0x2c, KeypadReturn = 0x3c,
KeypadDot = 0x4c, KeypadComma = 0x5c, Keypad3 = 0x6c,
Alt = 0x02,
LeftShift = 0x03,

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@@ -253,7 +253,7 @@ public:
void did_set_input(const Input &digital_input, const bool is_active) final {
if(const auto mapped_input = [&]() -> std::optional<JoystickInput> {
switch(digital_input.type) {
default: return std::nullopt;
default: return std::nullopt;
case Input::Up: return Up;
case Input::Down: return Down;
case Input::Left: return Left;

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@@ -104,9 +104,9 @@ public:
return channels_[channel].address.halves.low;
}
}
}
case 0x8: return status();
case 0xd: return temporary_register();
}
case 0x8: return status();
case 0xd: return temporary_register();
}
}

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@@ -266,7 +266,7 @@ public:
// Status:
// b7 = 1 => parity error on transmission;
// b6 = 1 => receive timeout;
// b5 = 1 => transmit timeout;
// b5 = 1 => transmit timeout;
// b4 = 1 => keyboard enabled via physical key;
// b3 = 1 = data at 0060 is command, 0 = data;
// b2 = 1 = selftest OK; 0 = just powered up or reset;
@@ -328,7 +328,7 @@ private:
switch(command) {
case Command::SelfTest: return 15;
default: return 0;
default: return 0;
}
}
@@ -448,11 +448,11 @@ private:
bool has_input_ = false;
bool has_command_ = false;
// bit 7 = 0 keyboard inhibited
// bit 6 = 0 CGA, else MDA
// bit 5 = 0 manufacturing jumper installed
// bit 4 = 0 system RAM 512K, else 640K
// bit 3-0 reserved
// bit 7 = 0 keyboard inhibited
// bit 6 = 0 CGA, else MDA
// bit 5 = 0 manufacturing jumper installed
// bit 4 = 0 system RAM 512K, else 640K
// bit 3-0 reserved
uint8_t switches_ = 0b1011'0000;
int perform_delay_ = 0;

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@@ -540,14 +540,14 @@ private:
case 0x0086: return dma_.pages.template page<6>();
case 0x0087: return dma_.pages.template page<7>();
case 0x0088: if(require_at(port)) return dma_.pages.template page<0x8>(); break;
case 0x0089: if(require_at(port)) return dma_.pages.template page<0x9>(); break;
case 0x008a: if(require_at(port)) return dma_.pages.template page<0xa>(); break;
case 0x008b: if(require_at(port)) return dma_.pages.template page<0xb>(); break;
case 0x008c: if(require_at(port)) return dma_.pages.template page<0xc>(); break;
case 0x008d: if(require_at(port)) return dma_.pages.template page<0xd>(); break;
case 0x008e: if(require_at(port)) return dma_.pages.template page<0xe>(); break;
case 0x008f: if(require_at(port)) return dma_.pages.template page<0xf>(); break;
case 0x0088: if(require_at(port)) return dma_.pages.template page<0x8>(); break;
case 0x0089: if(require_at(port)) return dma_.pages.template page<0x9>(); break;
case 0x008a: if(require_at(port)) return dma_.pages.template page<0xa>(); break;
case 0x008b: if(require_at(port)) return dma_.pages.template page<0xb>(); break;
case 0x008c: if(require_at(port)) return dma_.pages.template page<0xc>(); break;
case 0x008d: if(require_at(port)) return dma_.pages.template page<0xd>(); break;
case 0x008e: if(require_at(port)) return dma_.pages.template page<0xe>(); break;
case 0x008f: if(require_at(port)) return dma_.pages.template page<0xf>(); break;
case 0x03f4: return fdc_.status();
case 0x03f5: return fdc_.read();

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@@ -170,7 +170,7 @@ public:
void preauthorise_stack_read(const uint32_t size, const uint32_t granularity) {
const auto &descriptor = segments_.descriptors[InstructionSet::x86::Source::SS];
const auto trailing_distance = 65536 - registers_.sp();
const uint32_t trailing_distance = 65536 - registers_.sp();
if(trailing_distance >= size) {
descriptor.template authorise<InstructionSet::x86::AccessType::Read, uint16_t>(
uint16_t(registers_.sp()),
@@ -189,7 +189,7 @@ public:
0 // i.e. 65536
);
const auto remainder = size - trailing_distance;
const uint32_t remainder = size - trailing_distance;
descriptor.template authorise<InstructionSet::x86::AccessType::Read, uint16_t>(
0,
uint16_t(remainder)
@@ -198,10 +198,12 @@ public:
}
void preauthorise_read(const InstructionSet::x86::Source descriptor, const uint16_t offset, const uint32_t size) {
segments_.descriptors[descriptor].template authorise<InstructionSet::x86::AccessType::Read, uint16_t>(offset, offset + size);
segments_.descriptors[descriptor]
.template authorise<InstructionSet::x86::AccessType::Read, uint16_t>(offset, uint16_t(offset + size));
}
void preauthorise_write(const InstructionSet::x86::Source descriptor, const uint16_t offset, const uint32_t size) {
segments_.descriptors[descriptor].template authorise<InstructionSet::x86::AccessType::Write, uint16_t>(offset, offset + size);
segments_.descriptors[descriptor]
.template authorise<InstructionSet::x86::AccessType::Write, uint16_t>(offset, uint16_t(offset + size));
}
// TODO: perform authorisation checks.

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@@ -90,7 +90,7 @@ private:
delays[6] * 2,
delays[7] * 2
}
{}
{}
};
static constexpr Timings get_timings() {

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@@ -236,7 +236,7 @@ static CVReturn DisplayLinkCallback(__unused CVDisplayLinkRef displayLink, const
}
_windowTrackingArea =
[[NSTrackingArea alloc]
initWithRect:self.bounds
initWithRect:self.bounds
options:NSTrackingMouseEnteredAndExited | NSTrackingMouseMoved | NSTrackingActiveWhenFirstResponder
owner:self
userInfo:nil];

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@@ -46,7 +46,7 @@ NSSet *const allowList = [NSSet setWithArray:@[
// "Known bad" test hashes.
NSSet<NSString *> *knownBad = [NSSet setWithArray:@[
// Things that ostensibly push an SS to the stack rather than CS, likely due to a recording error:
@"7df1d2a948c416f5a4416e2f747d2d357d497570", // ce.json; INTO
@"7df1d2a948c416f5a4416e2f747d2d357d497570", // ce.json; INTO
@"ab0cea0f2b89ae469a98eaf20dedc9ff2ca08c91", // ff.3.json; far CALL
@"ba5bb16b5a4306333a359c3abd2169b871ffa42c", // cd.json; int 3bh

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@@ -117,7 +117,7 @@ fileprivate struct RegisterState {
interruptMode = Int(machine.value(for: .IM))
isHalted = machine.isHalted
tStates = 0 // TODO (?)
tStates = 0 // TODO (?)
memptr = machine.value(for: .memPtr)
}
}

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@@ -413,7 +413,7 @@ void perform(
case ASL: Operations::asl(registers, operand); break;
case ASO: Operations::aso(registers, operand); break;
case ROL: Operations::rol(registers, operand); break;
case RLA: Operations::rla(registers, operand); break;
case RLA: Operations::rla(registers, operand); break;
case LSR: Operations::lsr(registers, operand); break;
case LSE: Operations::lse(registers, operand); break;
case ASR: Operations::asr(registers, operand); break;
@@ -448,7 +448,7 @@ void perform(
case SBC: Operations::sbc<model>(registers, operand); break;
case ADC: Operations::adc<model>(registers, operand); break;
case ARR: Operations::arr<model>(registers, operand); break;
case SBX: Operations::sbx(registers, operand); break;
case SBX: Operations::sbx(registers, operand); break;
}
}

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@@ -363,7 +363,7 @@ void ProcessorStorage::assemble_base_page(InstructionPage &target, RegisterPair1
DEC_INC_DEC_LD(de_, de_.halves.low),
/* 0x1f RRA */ Sequence({MicroOp::RRA}),
/* 0x20 JR NZ */ JR(TestNZ), /* 0x21 LD HL, nn */ Sequence(Read16Inc(pc_, index)),
/* 0x20 JR NZ */ JR(TestNZ), /* 0x21 LD HL, nn */ Sequence(Read16Inc(pc_, index)),
/* 0x22 LD (nn), HL */ Sequence(Read16Inc(pc_, memptr_), Write16(memptr_, index)),
/* 0x23 INC HL; 0x24 INC H; 0x25 DEC H; 0x26 LD H, n */

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@@ -49,7 +49,7 @@ WOZ::WOZ(const std::string &file_name) :
// Test the CRC.
const uint32_t computed_crc = CRC::CRC32::crc_of(post_crc_contents_);
if(crc != computed_crc) {
throw Error::InvalidFormat;
throw Error::InvalidFormat;
}
// Retreat to the first byte after the CRC.

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@@ -23,7 +23,7 @@ FAT::Volume::CHS FAT::Volume::chs_for_sector(int sector) const {
track / head_count,
track % head_count,
1 + (sector % sectors_per_track)
};
};
}
int FAT::Volume::sector_for_cluster(uint16_t cluster) const {

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@@ -44,7 +44,7 @@ public:
private:
void set_data(std::vector<uint8_t> &&data, CompressionType type);
std::unique_ptr<FormatSerialiser> format_serialiser() const override;
std::unique_ptr<FormatSerialiser> format_serialiser() const override;
struct Serialiser: public FormatSerialiser {
Serialiser(const std::vector<uint8_t> &data, Pulse);

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@@ -58,7 +58,7 @@ enum Type: IntType {
AllDisk = Acorn | Commodore | AmstradCPC | C64 | Oric | MSX | ZXSpectrum | Macintosh | AtariST | DiskII | PCCompatible | FAT12,
AllTape = Acorn | AmstradCPC | Commodore8bit | Oric | ZX8081 | MSX | ZXSpectrum,
All = ~IntType(0),
All = ~IntType(0),
};
class Distinguisher {