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Add CMP, CMPA and TST tests and exclusions.
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@ -142,7 +142,6 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
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// case ANDIb: case ANDIl: case ANDIw:
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case SUBIb: case SUBIl: case SUBIw:
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case ADDIb: case ADDIl: case ADDIw:
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// case CMPIb: case CMPIl: case CMPIw:
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switch(original.mode<1>()) {
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default: return original;
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@ -154,6 +153,23 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
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return Preinstruction();
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}
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case CMPIb: case CMPIl: case CMPIw:
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switch(original.mode<1>()) {
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default: return original;
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case AddressingMode::ProgramCounterIndirectWithDisplacement:
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case AddressingMode::ProgramCounterIndirectWithIndex8bitDisplacement:
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if constexpr (model >= Model::M68010) {
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return original;
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}
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[[fallthrough]];
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case AddressingMode::AddressRegisterDirect:
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case AddressingMode::ImmediateData:
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case AddressingMode::None:
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return Preinstruction();
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}
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// ADD, SUB, MOVE, MOVEA
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case OpT(Operation::ADDb): case OpT(Operation::ADDw): case OpT(Operation::ADDl):
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case OpT(Operation::SUBb): case OpT(Operation::SUBw): case OpT(Operation::SUBl):
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@ -251,19 +267,41 @@ template <uint8_t op, bool validate> Preinstruction Predecoder<model>::validated
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case AddressingMode::ImmediateData:
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return Preinstruction();
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}
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//
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// case BCHGI: case BSETI: case BCLRI:
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// switch(original.mode<1>()) {
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// default: return original;
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//
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// case AddressingMode::None:
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// case AddressingMode::AddressRegisterDirect:
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// case AddressingMode::ProgramCounterIndirectWithDisplacement:
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// case AddressingMode::ProgramCounterIndirectWithIndex8bitDisplacement:
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// case AddressingMode::ImmediateData:
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// return Preinstruction();
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// }
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}
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case OpT(Operation::TSTb): case OpT(Operation::TSTw): case OpT(Operation::TSTl):
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switch(original.mode<0>()) {
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default: return original;
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case AddressingMode::AddressRegisterDirect:
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if constexpr (op == OpT(Operation::TSTb)) {
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return Preinstruction();
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}
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[[fallthrough]];
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case AddressingMode::ImmediateData:
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if constexpr (model < Model::M68020) {
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return Preinstruction();
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}
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return original;
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case AddressingMode::ProgramCounterIndirectWithDisplacement:
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case AddressingMode::ProgramCounterIndirectWithIndex8bitDisplacement:
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if constexpr (model >= Model::M68010) {
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return original;
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}
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[[fallthrough]];
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case AddressingMode::None:
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return Preinstruction();
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}
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case OpT(Operation::CMPAw): case OpT(Operation::CMPAl):
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switch(original.mode<0>()) {
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default: return original;
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case AddressingMode::None:
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return Preinstruction();
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}
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}
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}
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/// Decodes the fields within an instruction and constructs a `Preinstruction`, given that the operation has already been
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@ -138,6 +138,17 @@ template <int index> NSString *operand(Preinstruction instruction) {
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case Operation::BCHG: instruction = @"BCHG"; break;
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case Operation::BSET: instruction = @"BSET"; break;
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case Operation::CMPb: instruction = @"CMP.b"; break;
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case Operation::CMPw: instruction = @"CMP.w"; break;
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case Operation::CMPl: instruction = @"CMP.l"; break;
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case Operation::CMPAw: instruction = @"CMPA.w"; break;
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case Operation::CMPAl: instruction = @"CMPA.l"; break;
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case Operation::TSTb: instruction = @"TST.b"; break;
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case Operation::TSTw: instruction = @"TST.w"; break;
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case Operation::TSTl: instruction = @"TST.l"; break;
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// For now, skip any unmapped operations.
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default: continue;
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}
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