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Add TRAP suffix, disambiguate RTR and RTE.
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commit
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@ -1049,7 +1049,9 @@ struct ProcessorStorageConstructor {
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DirectMap(DIVU);
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DirectMap(DIVU);
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DirectMap(DIVS);
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DirectMap(DIVS);
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case Operation::RTE_RTR: opname = "RTE/RTR"; break;
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case Operation::RTE_RTR:
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opname = (opcode_ == 0x4e77) ? "RTR" : "RTE";
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break;
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DirectMap(TRAP);
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DirectMap(TRAP);
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DirectMap(TRAPV);
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DirectMap(TRAPV);
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@ -1133,6 +1135,8 @@ struct ProcessorStorageConstructor {
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} else {
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} else {
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sprintf(tbuf, "%d", val);
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sprintf(tbuf, "%d", val);
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}
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}
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} else if(operation_ == Operation::TRAP) {
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sprintf(tbuf, "%d", opcode_ & 15);
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} else {
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} else {
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const auto val = ((opcode_ >> 9)&7);
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const auto val = ((opcode_ >> 9)&7);
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sprintf(tbuf, "%d", val ? val : 8);
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sprintf(tbuf, "%d", val ? val : 8);
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@ -3307,6 +3311,7 @@ struct ProcessorStorageConstructor {
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break;
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break;
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case Decoder::TRAP: {
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case Decoder::TRAP: {
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dumper.set_source(Quick);
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// TRAP involves some oddly-sequenced stack writes, so is calculated
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// TRAP involves some oddly-sequenced stack writes, so is calculated
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// at runtime; also the same sequence is used for illegal instructions.
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// at runtime; also the same sequence is used for illegal instructions.
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// So the entirety is scheduled at runtime.
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// So the entirety is scheduled at runtime.
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