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Corrects memptr behaviour of OUT (C), 0.

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This commit is contained in:
Thomas Harte 2020-02-27 20:38:27 -05:00
parent a366077509
commit 87474d5916
4 changed files with 5 additions and 13 deletions
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2
OSBindings/Mac/Clock Signal.xcodeproj/xcshareddata/xcschemes/Clock Signal.xcscheme
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@ -67,7 +67,7 @@
</Testables>
</TestAction>
<LaunchAction
buildConfiguration = "Debug"
buildConfiguration = "Release"
selectedDebuggerIdentifier = "Xcode.DebuggerFoundation.Debugger.LLDB"
selectedLauncherIdentifier = "Xcode.DebuggerFoundation.Launcher.LLDB"
enableASanStackUseAfterReturn = "YES"

2
OSBindings/Mac/Clock SignalTests/PatrikRakTests.swift
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@ -93,7 +93,7 @@ class PatrikRakTests: XCTestCase, CSTestMachineTrapHandler {
func testMemptr() {
runTest("z80memptr")
// Current status: 6 of 152 tests failed.
// Current status: 4 of 152 tests failed.
}
func testMachine(_ testMachine: CSTestMachine, didTrapAtAddress address: UInt16) {

10
Processors/Z80/Implementation/Z80Implementation.hpp
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@ -806,15 +806,7 @@ template < class T,
sign_result_ = zero_result_ = bit53_result_ = *static_cast<uint8_t *>(operation->source);
set_parity(sign_result_);
set_did_compute_flags();
if(operation_ == 0xdb) {
// IN A, (n)
memptr_.full = bc_.full + 1;
} else {
// IN r, (C)
// TODO: this surely isn't right?
++memptr_.full;
}
++memptr_.full;
break;
case MicroOp::SetOutFlags:

4
Processors/Z80/Implementation/Z80Storage.cpp
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@ -245,7 +245,7 @@ void ProcessorStorage::install_default_instruction_set() {
void ProcessorStorage::assemble_ed_page(InstructionPage &target) {
#define IN_C(r) StdInstr({MicroOp::Move16, &bc_.full, &memptr_.full}, Input(bc_, r), {MicroOp::SetInFlags, &r})
#define OUT_C(r) StdInstr(Output(bc_, r), {MicroOp::SetOutFlags, &r})
#define OUT_C(r) StdInstr(Output(bc_, r), {MicroOp::SetOutFlags})
#define IN_OUT(r) IN_C(r), OUT_C(r)
#define NOP_ROW() NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP, NOP
@ -278,7 +278,7 @@ void ProcessorStorage::assemble_ed_page(InstructionPage &target) {
/* 0x6a ADC HL, HL */ ADC16(hl_, hl_), /* 0x6b LD HL, (nn) */ StdInstr(Read16Inc(pc_, memptr_), Read16(memptr_, hl_)),
/* 0x6c NEG */ StdInstr({MicroOp::NEG}), /* 0x6d RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}),
/* 0x6e IM 0/1 */ StdInstr({MicroOp::IM}), /* 0x6f RLD */ StdInstr(Read3(hl_, temp8_), InternalOperation(8), {MicroOp::RLD}, Write3(hl_, temp8_)),
/* 0x70 IN (C) */ IN_C(temp8_), /* 0x71 OUT (C), 0 */ StdInstr({MicroOp::SetZero}, Output(bc_, temp8_)),
/* 0x70 IN (C) */ IN_C(temp8_), /* 0x71 OUT (C), 0 */ StdInstr({MicroOp::SetZero}, Output(bc_, temp8_), {MicroOp::SetOutFlags}),
/* 0x72 SBC HL, SP */ SBC16(hl_, sp_), /* 0x73 LD (nn), SP */ StdInstr(Read16Inc(pc_, memptr_), Write16(memptr_, sp_)),
/* 0x74 NEG */ StdInstr({MicroOp::NEG}), /* 0x75 RETN */ StdInstr(Pop(pc_), {MicroOp::RETN}),
/* 0x76 IM 1 */ StdInstr({MicroOp::IM}), /* 0x77 XX */ NOP,