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mirror of https://github.com/TomHarte/CLK.git synced 2026-04-21 02:17:08 +00:00

Enable A20 at reset; fully propagate return to real mode.

This commit is contained in:
Thomas Harte
2025-04-03 16:14:49 -04:00
parent 0c88e62815
commit 88ed49a833
6 changed files with 26 additions and 7 deletions
+3 -1
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@@ -25,10 +25,12 @@ struct Descriptor {
Descriptor() = default;
Descriptor(const uint16_t descriptor[4]) noexcept {
printf("%04x %04x %04x %04x", descriptor[0], descriptor[1], descriptor[2], descriptor[3]);
base_ = uint32_t(descriptor[1] | ((descriptor[2] & 0xff) << 16));
limit_ = descriptor[0];
printf("%04x %04x %04x %04x\n", descriptor[0], descriptor[1], descriptor[2], descriptor[3]);
printf(" -> %04x -> +%04x\n", base_, limit_);
present_ = descriptor[2] & 0x8000;
privilege_level_ = (descriptor[2] >> 13) & 3;
@@ -95,8 +95,9 @@ void lmsw(
) {
context.registers.set_msw(source);
if(source & MachineStatus::ProtectedModeEnable) {
context.memory.set_mode(Mode::Protected286);
context.segments.set_mode(Mode::Protected286);
context.cpu_control.set_mode(Mode::Protected286);
// context.memory.set_mode(Mode::Protected286);
// context.segments.set_mode(Mode::Protected286);
}
}
+17 -1
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@@ -12,6 +12,7 @@
#include "ProcessorByModel.hpp"
#include "Registers.hpp"
#include "Segments.hpp"
#include "SegmentedMemory.hpp"
#include "Analyser/Static/PCCompatible/Target.hpp"
#include "Outputs/Log.hpp"
@@ -24,10 +25,17 @@ public:
CPUControl(
Registers<processor_model(model)> &registers,
Segments<processor_model(model)> &segments,
SegmentedMemory<processor_model(model)> &segmented_memory,
LinearMemory<processor_model(model)> &linear_memory
) : registers_(registers), segments_(segments), linear_memory_(linear_memory) {}
) :
registers_(registers),
segments_(segments),
segmented_memory_(segmented_memory),
linear_memory_(linear_memory) {}
using Mode = InstructionSet::x86::Mode;
void reset() {
set_mode(Mode::Real);
registers_.reset();
segments_.reset();
}
@@ -38,9 +46,17 @@ public:
linear_memory_.set_a20_enabled(enabled);
}
void set_mode(const Mode mode) {
if constexpr (processor_model(model) >= InstructionSet::x86::Model::i80286) {
segments_.set_mode(mode);
segmented_memory_.set_mode(mode);
}
}
private:
Registers<processor_model(model)> &registers_;
Segments<processor_model(model)> &segments_;
SegmentedMemory<processor_model(model)> &segmented_memory_;
LinearMemory<processor_model(model)> &linear_memory_;
Log::Logger<Log::Source::PCCompatible> log_;
+1 -1
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@@ -251,7 +251,7 @@ public:
if(index == 0x00) {
log_.info().append("%02x", value);
if(value == 0x1b) {
if(value == 0x1d) {
printf("");
}
}
+1 -1
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@@ -212,7 +212,7 @@ struct LinearMemory<model, std::enable_if_t<model <= InstructionSet::x86::Model:
template <>
struct LinearMemory<InstructionSet::x86::Model::i80286>: public LinearPool<1 << 24> {
LinearMemory() {
set_a20_enabled(false);
set_a20_enabled(true);
}
// A20 is the only thing that can cause split accesses on an 80286.
+1 -1
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@@ -982,7 +982,7 @@ private:
segments(registers, linear_memory),
memory(registers, segments, linear_memory),
flow_controller(registers, segments),
cpu_control(registers, segments, linear_memory),
cpu_control(registers, segments, memory, linear_memory),
io(pit, dma, ppi, pics, card, fdc, keyboard, rtc)
{
keyboard.set_cpu_control(&cpu_control);