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Template various bits of hardware on machine type.

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This commit is contained in:
Thomas Harte
2025-03-04 17:08:49 -05:00
parent 4e3b0ae3c1
commit 89fd41124f
11 changed files with 438 additions and 361 deletions
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Analyser/Static/PCCompatible/Target.hpp
+8 -8
View File
@@ -13,19 +13,19 @@
namespace Analyser::Static::PCCompatible {
ReflectableEnum(Model,
XT,
TurboXT,
AT
);
struct Target: public Analyser::Static::Target, public Reflection::StructImpl<Target> {
ReflectableEnum(VideoAdaptor,
MDA,
CGA,
);
VideoAdaptor adaptor = VideoAdaptor::CGA;
ReflectableEnum(ModelApproximation,
XT,
TurboXT,
AT
);
ModelApproximation model = ModelApproximation::TurboXT;
Model model = Model::TurboXT;
Target() : Analyser::Static::Target(Machine::PCCompatible) {}
@@ -33,7 +33,7 @@ private:
friend Reflection::StructImpl<Target>;
void declare_fields() {
AnnounceEnum(VideoAdaptor);
AnnounceEnum(ModelApproximation);
AnnounceEnum(Model);
DeclareField(adaptor);
DeclareField(model);
}
Machines/PCCompatible/DMA.hpp
+4 -2
View File
@@ -8,6 +8,7 @@
#pragma once
#include "Analyser/Static/PCCompatible/Target.hpp"
#include "Numeric/RegisterSizes.hpp"
#include "Memory.hpp"
@@ -287,13 +288,14 @@ class DMAPages {
}
};
template <Analyser::Static::PCCompatible::Model model>
class DMA {
public:
i8237 controller;
DMAPages pages;
// Memory is set posthoc to resolve a startup time.
void set_memory(Memory *memory) {
void set_memory(Memory<model> *memory) {
memory_ = memory;
}
@@ -310,7 +312,7 @@ class DMA {
}
private:
Memory *memory_;
Memory<model> *memory_;
};
}
Machines/PCCompatible/Memory.hpp
+183 -177
View File
@@ -8,9 +8,11 @@
#pragma once
#include "ProcessorByModel.hpp"
#include "Registers.hpp"
#include "Segments.hpp"
#include "Analyser/Static/PCCompatible/Target.hpp"
#include "InstructionSets/x86/AccessType.hpp"
#include <array>
@@ -18,198 +20,202 @@
namespace PCCompatible {
// TODO: send writes to the ROM area off to nowhere.
struct Memory {
public:
using AccessType = InstructionSet::x86::AccessType;
template <Analyser::Static::PCCompatible::Model model>
class Memory {
static constexpr auto x86_model = processor_model(model);
// Constructor.
Memory(Registers &registers, const Segments &segments) : registers_(registers), segments_(segments) {}
public:
using AccessType = InstructionSet::x86::AccessType;
//
// Preauthorisation call-ins. Since only an 8088 is currently modelled, all accesses are implicitly authorised.
//
void preauthorise_stack_write([[maybe_unused]] uint32_t length) {}
void preauthorise_stack_read([[maybe_unused]] uint32_t length) {}
void preauthorise_read([[maybe_unused]] InstructionSet::x86::Source segment, [[maybe_unused]] uint16_t start, [[maybe_unused]] uint32_t length) {}
void preauthorise_read([[maybe_unused]] uint32_t start, [[maybe_unused]] uint32_t length) {}
// Constructor.
Memory(Registers<x86_model> &registers, const Segments<x86_model> &segments) :
registers_(registers), segments_(segments) {}
//
// Access call-ins.
//
//
// Preauthorisation call-ins. Since only an 8088 is currently modelled, all accesses are implicitly authorised.
//
void preauthorise_stack_write([[maybe_unused]] uint32_t length) {}
void preauthorise_stack_read([[maybe_unused]] uint32_t length) {}
void preauthorise_read([[maybe_unused]] InstructionSet::x86::Source segment, [[maybe_unused]] uint16_t start, [[maybe_unused]] uint32_t length) {}
void preauthorise_read([[maybe_unused]] uint32_t start, [[maybe_unused]] uint32_t length) {}
// Accesses an address based on segment:offset.
template <typename IntT, AccessType type>
typename InstructionSet::x86::Accessor<IntT, type>::type access(
const InstructionSet::x86::Source segment,
const uint16_t offset
) {
const uint32_t physical_address = address(segment, offset);
//
// Access call-ins.
//
if constexpr (std::is_same_v<IntT, uint16_t>) {
// If this is a 16-bit access that runs past the end of the segment, it'll wrap back
// to the start. So the 16-bit value will need to be a local cache.
if(offset == 0xffff) {
return split_word<type>(physical_address, address(segment, 0));
}
}
// Accesses an address based on segment:offset.
template <typename IntT, AccessType type>
typename InstructionSet::x86::Accessor<IntT, type>::type access(
const InstructionSet::x86::Source segment,
const uint16_t offset
) {
const uint32_t physical_address = address(segment, offset);
return access<IntT, type>(physical_address);
}
// Accesses an address based on physical location.
template <typename IntT, AccessType type>
typename InstructionSet::x86::Accessor<IntT, type>::type access(const uint32_t address) {
// Dispense with the single-byte case trivially.
if constexpr (std::is_same_v<IntT, uint8_t>) {
return memory[address];
} else if(address != 0xf'ffff) {
return *reinterpret_cast<IntT *>(&memory[address]);
} else {
return split_word<type>(address, 0);
}
}
template <typename IntT>
void write_back() {
if constexpr (std::is_same_v<IntT, uint16_t>) {
if(write_back_address_[0] != NoWriteBack) {
memory[write_back_address_[0]] = write_back_value_ & 0xff;
memory[write_back_address_[1]] = write_back_value_ >> 8;
write_back_address_[0] = 0;
}
}
}
//
// Direct read and write.
//
template <typename IntT>
void preauthorised_write(
const InstructionSet::x86::Source segment,
const uint16_t offset,
const IntT value
) {
// Bytes can be written without further ado.
if constexpr (std::is_same_v<IntT, uint8_t>) {
memory[address(segment, offset) & 0xf'ffff] = value;
return;
}
// Words that straddle the segment end must be split in two.
if constexpr (std::is_same_v<IntT, uint16_t>) {
// If this is a 16-bit access that runs past the end of the segment, it'll wrap back
// to the start. So the 16-bit value will need to be a local cache.
if(offset == 0xffff) {
memory[address(segment, offset) & 0xf'ffff] = value & 0xff;
memory[address(segment, 0x0000) & 0xf'ffff] = value >> 8;
return;
}
const uint32_t target = address(segment, offset) & 0xf'ffff;
// Words that straddle the end of physical RAM must also be split in two.
if(target == 0xf'ffff) {
memory[0xf'ffff] = value & 0xff;
memory[0x0'0000] = value >> 8;
return;
}
// It's safe just to write then.
*reinterpret_cast<IntT *>(&memory[target]) = value;
}
template <typename IntT>
IntT preauthorised_read(
const InstructionSet::x86::Source segment,
const uint16_t offset
) {
// Bytes can be written without further ado.
if constexpr (std::is_same_v<IntT, uint8_t>) {
return memory[address(segment, offset) & 0xf'ffff];
}
// Words that straddle the segment end must be split in two.
if(offset == 0xffff) {
return IntT(
memory[address(segment, offset) & 0xf'ffff] |
memory[address(segment, 0x0000) & 0xf'ffff] << 8
);
}
const uint32_t target = address(segment, offset) & 0xf'ffff;
// Words that straddle the end of physical RAM must also be split in two.
if(target == 0xf'ffff) {
return IntT(
memory[0xf'ffff] |
memory[0x0'0000] << 8
);
}
// It's safe just to write then.
return *reinterpret_cast<IntT *>(&memory[target]);
}
//
// Helper for instruction fetch.
//
std::pair<const uint8_t *, size_t> next_code() const {
const uint32_t start = segments_.cs_base_ + registers_.ip();
return std::make_pair(&memory[start], 0x10'000 - start);
}
std::pair<const uint8_t *, size_t> all() const {
return std::make_pair(memory.data(), 0x10'000);
}
//
// External access.
//
void install(size_t address, const uint8_t *data, size_t length) {
std::copy(data, data + length, memory.begin() + std::vector<uint8_t>::difference_type(address));
}
uint8_t *at(uint32_t address) {
return &memory[address];
}
private:
std::array<uint8_t, 1024*1024> memory{0xff};
Registers &registers_;
const Segments &segments_;
uint32_t segment_base(const InstructionSet::x86::Source segment) const {
using Source = InstructionSet::x86::Source;
switch(segment) {
default: return segments_.ds_base_;
case Source::ES: return segments_.es_base_;
case Source::CS: return segments_.cs_base_;
case Source::SS: return segments_.ss_base_;
return split_word<type>(physical_address, address(segment, 0));
}
}
uint32_t address(const InstructionSet::x86::Source segment, const uint16_t offset) const {
return (segment_base(segment) + offset) & 0xf'ffff;
return access<IntT, type>(physical_address);
}
// Accesses an address based on physical location.
template <typename IntT, AccessType type>
typename InstructionSet::x86::Accessor<IntT, type>::type access(const uint32_t address) {
// Dispense with the single-byte case trivially.
if constexpr (std::is_same_v<IntT, uint8_t>) {
return memory[address];
} else if(address != 0xf'ffff) {
return *reinterpret_cast<IntT *>(&memory[address]);
} else {
return split_word<type>(address, 0);
}
}
template <AccessType type>
typename InstructionSet::x86::Accessor<uint16_t, type>::type
split_word(const uint32_t low_address, const uint32_t high_address) {
if constexpr (is_writeable(type)) {
write_back_address_[0] = low_address;
write_back_address_[1] = high_address;
// Prepopulate only if this is a modify.
if constexpr (type == AccessType::ReadModifyWrite) {
write_back_value_ = uint16_t(memory[write_back_address_[0]] | (memory[write_back_address_[1]] << 8));
}
return write_back_value_;
} else {
return uint16_t(memory[low_address] | (memory[high_address] << 8));
template <typename IntT>
void write_back() {
if constexpr (std::is_same_v<IntT, uint16_t>) {
if(write_back_address_[0] != NoWriteBack) {
memory[write_back_address_[0]] = write_back_value_ & 0xff;
memory[write_back_address_[1]] = write_back_value_ >> 8;
write_back_address_[0] = 0;
}
}
}
static constexpr uint32_t NoWriteBack = 0; // A low byte address of 0 can't require write-back.
uint32_t write_back_address_[2] = {NoWriteBack, NoWriteBack};
uint16_t write_back_value_;
//
// Direct read and write.
//
template <typename IntT>
void preauthorised_write(
const InstructionSet::x86::Source segment,
const uint16_t offset,
const IntT value
) {
// Bytes can be written without further ado.
if constexpr (std::is_same_v<IntT, uint8_t>) {
memory[address(segment, offset) & 0xf'ffff] = value;
return;
}
// Words that straddle the segment end must be split in two.
if(offset == 0xffff) {
memory[address(segment, offset) & 0xf'ffff] = value & 0xff;
memory[address(segment, 0x0000) & 0xf'ffff] = value >> 8;
return;
}
const uint32_t target = address(segment, offset) & 0xf'ffff;
// Words that straddle the end of physical RAM must also be split in two.
if(target == 0xf'ffff) {
memory[0xf'ffff] = value & 0xff;
memory[0x0'0000] = value >> 8;
return;
}
// It's safe just to write then.
*reinterpret_cast<IntT *>(&memory[target]) = value;
}
template <typename IntT>
IntT preauthorised_read(
const InstructionSet::x86::Source segment,
const uint16_t offset
) {
// Bytes can be written without further ado.
if constexpr (std::is_same_v<IntT, uint8_t>) {
return memory[address(segment, offset) & 0xf'ffff];
}
// Words that straddle the segment end must be split in two.
if(offset == 0xffff) {
return IntT(
memory[address(segment, offset) & 0xf'ffff] |
memory[address(segment, 0x0000) & 0xf'ffff] << 8
);
}
const uint32_t target = address(segment, offset) & 0xf'ffff;
// Words that straddle the end of physical RAM must also be split in two.
if(target == 0xf'ffff) {
return IntT(
memory[0xf'ffff] |
memory[0x0'0000] << 8
);
}
// It's safe just to write then.
return *reinterpret_cast<IntT *>(&memory[target]);
}
//
// Helper for instruction fetch.
//
std::pair<const uint8_t *, size_t> next_code() const {
const uint32_t start = segments_.cs_base_ + registers_.ip();
return std::make_pair(&memory[start], 0x10'000 - start);
}
std::pair<const uint8_t *, size_t> all() const {
return std::make_pair(memory.data(), 0x10'000);
}
//
// External access.
//
void install(size_t address, const uint8_t *data, size_t length) {
std::copy(data, data + length, memory.begin() + std::vector<uint8_t>::difference_type(address));
}
uint8_t *at(uint32_t address) {
return &memory[address];
}
private:
std::array<uint8_t, 1024*1024> memory{0xff};
Registers<x86_model> &registers_;
const Segments<x86_model> &segments_;
uint32_t segment_base(const InstructionSet::x86::Source segment) const {
using Source = InstructionSet::x86::Source;
switch(segment) {
default: return segments_.ds_base_;
case Source::ES: return segments_.es_base_;
case Source::CS: return segments_.cs_base_;
case Source::SS: return segments_.ss_base_;
}
}
uint32_t address(const InstructionSet::x86::Source segment, const uint16_t offset) const {
return (segment_base(segment) + offset) & 0xf'ffff;
}
template <AccessType type>
typename InstructionSet::x86::Accessor<uint16_t, type>::type
split_word(const uint32_t low_address, const uint32_t high_address) {
if constexpr (is_writeable(type)) {
write_back_address_[0] = low_address;
write_back_address_[1] = high_address;
// Prepopulate only if this is a modify.
if constexpr (type == AccessType::ReadModifyWrite) {
write_back_value_ = uint16_t(memory[write_back_address_[0]] | (memory[write_back_address_[1]] << 8));
}
return write_back_value_;
} else {
return uint16_t(memory[low_address] | (memory[high_address] << 8));
}
}
static constexpr uint32_t NoWriteBack = 0; // A low byte address of 0 can't require write-back.
uint32_t write_back_address_[2] = {NoWriteBack, NoWriteBack};
uint16_t write_back_value_;
};
}
Machines/PCCompatible/PCCompatible.cpp
+188 -167
View File
@@ -8,6 +8,7 @@
#include "PCCompatible.hpp"
#include "ProcessorByModel.hpp"
#include "CGA.hpp"
#include "DMA.hpp"
#include "KeyboardMapper.hpp"
@@ -52,17 +53,7 @@
namespace PCCompatible {
namespace {
Log::Logger<Log::Source::PCCompatible> log;
using PCModelApproximation = Analyser::Static::PCCompatible::Target::ModelApproximation;
constexpr InstructionSet::x86::Model processor_model(PCModelApproximation model) {
switch(model) {
default: return InstructionSet::x86::Model::i8086;
case PCModelApproximation::AT: return InstructionSet::x86::Model::i80286;
}
}
}
using Target = Analyser::Static::PCCompatible::Target;
@@ -72,9 +63,14 @@ template <Target::VideoAdaptor adaptor> struct Adaptor;
template <> struct Adaptor<Target::VideoAdaptor::MDA> { using type = MDA; };
template <> struct Adaptor<Target::VideoAdaptor::CGA> { using type = CGA; };
template <Analyser::Static::PCCompatible::Model model>
class FloppyController {
public:
FloppyController(PIC &pic, DMA &dma, int drive_count) : pic_(pic), dma_(dma) {
FloppyController(
PIC<model> &pic,
DMA<model> &dma,
int drive_count
) : pic_(pic), dma_(dma) {
// Default: one floppy drive only.
for(int c = 0; c < 4; c++) {
drives_[c].exists = drive_count > c;
@@ -107,7 +103,7 @@ class FloppyController {
}
hold_reset_ = hold_reset;
if(hold_reset_) {
pic_.apply_edge<6>(false);
pic_.template apply_edge<6>(false);
}
}
@@ -143,7 +139,7 @@ class FloppyController {
// TODO: what if head has changed?
drives_[decoder_.target().drive].status = decoder_.drive_head();
drives_[decoder_.target().drive].raised_interrupt = true;
pic_.apply_edge<6>(true);
pic_.template apply_edge<6>(true);
} break;
case Command::ReadDeletedData:
@@ -204,7 +200,7 @@ class FloppyController {
// TODO: what if head has changed?
drives_[decoder_.target().drive].status = decoder_.drive_head();
drives_[decoder_.target().drive].raised_interrupt = true;
pic_.apply_edge<6>(true);
pic_.template apply_edge<6>(true);
} break;
case Command::Recalibrate:
@@ -212,14 +208,14 @@ class FloppyController {
drives_[decoder_.target().drive].raised_interrupt = true;
drives_[decoder_.target().drive].status = decoder_.target().drive | uint8_t(Intel::i8272::Status0::SeekEnded);
pic_.apply_edge<6>(true);
pic_.template apply_edge<6>(true);
break;
case Command::Seek:
drives_[decoder_.target().drive].track = decoder_.seek_target();
drives_[decoder_.target().drive].raised_interrupt = true;
drives_[decoder_.target().drive].status = decoder_.drive_head() | uint8_t(Intel::i8272::Status0::SeekEnded);
pic_.apply_edge<6>(true);
pic_.template apply_edge<6>(true);
break;
case Command::SenseInterruptStatus: {
@@ -237,7 +233,7 @@ class FloppyController {
any_remaining_interrupts |= drives_[c].raised_interrupt;
}
if(!any_remaining_interrupts) {
pic_.apply_edge<6>(false);
pic_.template apply_edge<6>(false);
}
} break;
case Command::Specify:
@@ -309,15 +305,15 @@ class FloppyController {
drives_[c].raised_interrupt = true;
drives_[c].status = uint8_t(Intel::i8272::Status0::BecameNotReady);
}
pic_.apply_edge<6>(true);
pic_.template apply_edge<6>(true);
using MainStatus = Intel::i8272::MainStatus;
status_.set(MainStatus::DataReady, true);
status_.set(MainStatus::DataIsToProcessor, false);
}
PIC &pic_;
DMA &dma_;
PIC<model> &pic_;
DMA<model> &dma_;
bool hold_reset_ = false;
bool enable_dma_ = false;
@@ -361,9 +357,10 @@ class FloppyController {
Activity::Observer *observer_ = nullptr;
};
template <Analyser::Static::PCCompatible::Model model>
class KeyboardController {
public:
KeyboardController(PIC &pic) : pic_(pic) {}
KeyboardController(PIC<model> &pic) : pic_(pic) {}
// KB Status Port 61h high bits:
//; 01 - normal operation. wait for keypress, when one comes in,
@@ -380,13 +377,13 @@ class KeyboardController {
switch(mode_) {
case Mode::NormalOperation: break;
case Mode::NoIRQsIgnoreInput:
pic_.apply_edge<1>(false);
pic_.template apply_edge<1>(false);
break;
case Mode::Reset:
input_.clear();
[[fallthrough]];
case Mode::ClearIRQReset:
pic_.apply_edge<1>(false);
pic_.template apply_edge<1>(false);
break;
}
@@ -408,7 +405,7 @@ class KeyboardController {
}
uint8_t read() {
pic_.apply_edge<1>(false);
pic_.template apply_edge<1>(false);
if(input_.empty()) {
return 0;
}
@@ -416,7 +413,7 @@ class KeyboardController {
const uint8_t key = input_.front();
input_.erase(input_.begin());
if(!input_.empty()) {
pic_.apply_edge<1>(true);
pic_.template apply_edge<1>(true);
}
return key;
}
@@ -426,7 +423,7 @@ class KeyboardController {
return;
}
input_.push_back(value);
pic_.apply_edge<1>(true);
pic_.template apply_edge<1>(true);
}
private:
@@ -438,7 +435,7 @@ class KeyboardController {
} mode_;
std::vector<uint8_t> input_;
PIC &pic_;
PIC<model> &pic_;
int reset_delay_ = 0;
};
@@ -486,21 +483,22 @@ struct PCSpeaker {
bool output_ = false;
};
template <Analyser::Static::PCCompatible::Model model>
class PITObserver {
public:
PITObserver(PIC &pic, PCSpeaker &speaker) : pic_(pic), speaker_(speaker) {}
PITObserver(PIC<model> &pic, PCSpeaker &speaker) : pic_(pic), speaker_(speaker) {}
template <int channel>
void update_output(bool new_level) {
switch(channel) {
default: break;
case 0: pic_.apply_edge<0>(new_level); break;
case 2: speaker_.set_pit(new_level); break;
case 0: pic_.template apply_edge<0>(new_level); break;
case 2: speaker_.set_pit(new_level); break;
}
}
private:
PIC &pic_;
PIC<model> &pic_;
PCSpeaker &speaker_;
// TODO:
@@ -509,11 +507,19 @@ class PITObserver {
// channel 1 is used for DRAM refresh (presumably connected to DMA?);
// channel 2 is gated by a PPI output and feeds into the speaker.
};
using PIT = i8253<false, PITObserver>;
template <Analyser::Static::PCCompatible::Model model>
using PIT = i8253<false, PITObserver<model>>;
template <Analyser::Static::PCCompatible::Model model>
class i8255PortHandler : public Intel::i8255::PortHandler {
public:
i8255PortHandler(PCSpeaker &speaker, KeyboardController &keyboard, Target::VideoAdaptor adaptor, int drive_count) :
i8255PortHandler(
PCSpeaker &speaker,
KeyboardController<model> &keyboard,
const Target::VideoAdaptor adaptor,
const int drive_count
) :
speaker_(speaker), keyboard_(keyboard) {
// High switches:
//
@@ -600,16 +606,25 @@ class i8255PortHandler : public Intel::i8255::PortHandler {
bool use_high_switches_ = false;
PCSpeaker &speaker_;
KeyboardController &keyboard_;
KeyboardController<model> &keyboard_;
bool enable_keyboard_ = false;
};
using PPI = Intel::i8255::i8255<i8255PortHandler>;
template <Analyser::Static::PCCompatible::Model model>
using PPI = Intel::i8255::i8255<i8255PortHandler<model>>;
template <Target::VideoAdaptor video>
template <Analyser::Static::PCCompatible::Model model, Target::VideoAdaptor video>
class IO {
public:
IO(PIT &pit, DMA &dma, PPI &ppi, PIC &pic, typename Adaptor<video>::type &card, FloppyController &fdc, RTC &rtc) :
IO(
PIT<model> &pit,
DMA<model> &dma,
PPI<model> &ppi,
PIC<model> &pic,
typename Adaptor<video>::type &card,
FloppyController<model> &fdc,
RTC &rtc
) :
pit_(pit), dma_(dma), ppi_(ppi), pic_(pic), video_(card), fdc_(fdc), rtc_(rtc) {}
template <typename IntT> void out(uint16_t port, IntT value) {
@@ -633,30 +648,30 @@ class IO {
log.error().append("TODO: NMIs %s", (value & 0x80) ? "masked" : "unmasked");
break;
case 0x0000: dma_.controller.write<0x0>(uint8_t(value)); break;
case 0x0001: dma_.controller.write<0x1>(uint8_t(value)); break;
case 0x0002: dma_.controller.write<0x2>(uint8_t(value)); break;
case 0x0003: dma_.controller.write<0x3>(uint8_t(value)); break;
case 0x0004: dma_.controller.write<0x4>(uint8_t(value)); break;
case 0x0005: dma_.controller.write<0x5>(uint8_t(value)); break;
case 0x0006: dma_.controller.write<0x6>(uint8_t(value)); break;
case 0x0007: dma_.controller.write<0x7>(uint8_t(value)); break;
case 0x0008: dma_.controller.write<0x8>(uint8_t(value)); break;
case 0x0009: dma_.controller.write<0x9>(uint8_t(value)); break;
case 0x000a: dma_.controller.write<0xa>(uint8_t(value)); break;
case 0x000b: dma_.controller.write<0xb>(uint8_t(value)); break;
case 0x000c: dma_.controller.write<0xc>(uint8_t(value)); break;
case 0x000d: dma_.controller.write<0xd>(uint8_t(value)); break;
case 0x000e: dma_.controller.write<0xe>(uint8_t(value)); break;
case 0x000f: dma_.controller.write<0xf>(uint8_t(value)); break;
case 0x0000: dma_.controller.template write<0x0>(uint8_t(value)); break;
case 0x0001: dma_.controller.template write<0x1>(uint8_t(value)); break;
case 0x0002: dma_.controller.template write<0x2>(uint8_t(value)); break;
case 0x0003: dma_.controller.template write<0x3>(uint8_t(value)); break;
case 0x0004: dma_.controller.template write<0x4>(uint8_t(value)); break;
case 0x0005: dma_.controller.template write<0x5>(uint8_t(value)); break;
case 0x0006: dma_.controller.template write<0x6>(uint8_t(value)); break;
case 0x0007: dma_.controller.template write<0x7>(uint8_t(value)); break;
case 0x0008: dma_.controller.template write<0x8>(uint8_t(value)); break;
case 0x0009: dma_.controller.template write<0x9>(uint8_t(value)); break;
case 0x000a: dma_.controller.template write<0xa>(uint8_t(value)); break;
case 0x000b: dma_.controller.template write<0xb>(uint8_t(value)); break;
case 0x000c: dma_.controller.template write<0xc>(uint8_t(value)); break;
case 0x000d: dma_.controller.template write<0xd>(uint8_t(value)); break;
case 0x000e: dma_.controller.template write<0xe>(uint8_t(value)); break;
case 0x000f: dma_.controller.template write<0xf>(uint8_t(value)); break;
case 0x0020: pic_.write<0>(uint8_t(value)); break;
case 0x0021: pic_.write<1>(uint8_t(value)); break;
case 0x0020: pic_.template write<0>(uint8_t(value)); break;
case 0x0021: pic_.template write<1>(uint8_t(value)); break;
case 0x0040: pit_.write<0>(uint8_t(value)); break;
case 0x0041: pit_.write<1>(uint8_t(value)); break;
case 0x0042: pit_.write<2>(uint8_t(value)); break;
case 0x0043: pit_.set_mode(uint8_t(value)); break;
case 0x0040: pit_.template write<0>(uint8_t(value)); break;
case 0x0041: pit_.template write<1>(uint8_t(value)); break;
case 0x0042: pit_.template write<2>(uint8_t(value)); break;
case 0x0043: pit_.set_mode(uint8_t(value)); break;
case 0x0060: case 0x0061: case 0x0062: case 0x0063:
case 0x0064: case 0x0065: case 0x0066: case 0x0067:
@@ -665,14 +680,14 @@ class IO {
ppi_.write(port, uint8_t(value));
break;
case 0x0080: dma_.pages.set_page<0>(uint8_t(value)); break;
case 0x0081: dma_.pages.set_page<1>(uint8_t(value)); break;
case 0x0082: dma_.pages.set_page<2>(uint8_t(value)); break;
case 0x0083: dma_.pages.set_page<3>(uint8_t(value)); break;
case 0x0084: dma_.pages.set_page<4>(uint8_t(value)); break;
case 0x0085: dma_.pages.set_page<5>(uint8_t(value)); break;
case 0x0086: dma_.pages.set_page<6>(uint8_t(value)); break;
case 0x0087: dma_.pages.set_page<7>(uint8_t(value)); break;
case 0x0080: dma_.pages.template set_page<0>(uint8_t(value)); break;
case 0x0081: dma_.pages.template set_page<1>(uint8_t(value)); break;
case 0x0082: dma_.pages.template set_page<2>(uint8_t(value)); break;
case 0x0083: dma_.pages.template set_page<3>(uint8_t(value)); break;
case 0x0084: dma_.pages.template set_page<4>(uint8_t(value)); break;
case 0x0085: dma_.pages.template set_page<5>(uint8_t(value)); break;
case 0x0086: dma_.pages.template set_page<6>(uint8_t(value)); break;
case 0x0087: dma_.pages.template set_page<7>(uint8_t(value)); break;
//
// CRTC access block, with slightly laboured 16-bit to 8-bit mapping.
@@ -733,28 +748,28 @@ class IO {
log.error().append("Unhandled in: %04x", port);
break;
case 0x0000: return dma_.controller.read<0x0>();
case 0x0001: return dma_.controller.read<0x1>();
case 0x0002: return dma_.controller.read<0x2>();
case 0x0003: return dma_.controller.read<0x3>();
case 0x0004: return dma_.controller.read<0x4>();
case 0x0005: return dma_.controller.read<0x5>();
case 0x0006: return dma_.controller.read<0x6>();
case 0x0007: return dma_.controller.read<0x7>();
case 0x0008: return dma_.controller.read<0x8>();
case 0x000d: return dma_.controller.read<0xd>();
case 0x0000: return dma_.controller.template read<0x0>();
case 0x0001: return dma_.controller.template read<0x1>();
case 0x0002: return dma_.controller.template read<0x2>();
case 0x0003: return dma_.controller.template read<0x3>();
case 0x0004: return dma_.controller.template read<0x4>();
case 0x0005: return dma_.controller.template read<0x5>();
case 0x0006: return dma_.controller.template read<0x6>();
case 0x0007: return dma_.controller.template read<0x7>();
case 0x0008: return dma_.controller.template read<0x8>();
case 0x000d: return dma_.controller.template read<0xd>();
case 0x0009: case 0x000b:
case 0x000c: case 0x000f:
// DMA area, but it doesn't respond.
break;
case 0x0020: return pic_.read<0>();
case 0x0021: return pic_.read<1>();
case 0x0020: return pic_.template read<0>();
case 0x0021: return pic_.template read<1>();
case 0x0040: return pit_.read<0>();
case 0x0041: return pit_.read<1>();
case 0x0042: return pit_.read<2>();
case 0x0040: return pit_.template read<0>();
case 0x0041: return pit_.template read<1>();
case 0x0042: return pit_.template read<2>();
case 0x0060: case 0x0061: case 0x0062: case 0x0063:
case 0x0064: case 0x0065: case 0x0066: case 0x0067:
@@ -764,14 +779,14 @@ class IO {
case 0x0071: return rtc_.read();
case 0x0080: return dma_.pages.page<0>();
case 0x0081: return dma_.pages.page<1>();
case 0x0082: return dma_.pages.page<2>();
case 0x0083: return dma_.pages.page<3>();
case 0x0084: return dma_.pages.page<4>();
case 0x0085: return dma_.pages.page<5>();
case 0x0086: return dma_.pages.page<6>();
case 0x0087: return dma_.pages.page<7>();
case 0x0080: return dma_.pages.template page<0>();
case 0x0081: return dma_.pages.template page<1>();
case 0x0082: return dma_.pages.template page<2>();
case 0x0083: return dma_.pages.template page<3>();
case 0x0084: return dma_.pages.template page<4>();
case 0x0085: return dma_.pages.template page<5>();
case 0x0086: return dma_.pages.template page<6>();
case 0x0087: return dma_.pages.template page<7>();
case 0x0201: break; // Ignore game port.
@@ -811,69 +826,72 @@ class IO {
}
private:
PIT &pit_;
DMA &dma_;
PPI &ppi_;
PIC &pic_;
PIT<model> &pit_;
DMA<model> &dma_;
PPI<model> &ppi_;
PIC<model> &pic_;
typename Adaptor<video>::type &video_;
FloppyController &fdc_;
FloppyController<model> &fdc_;
RTC &rtc_;
};
template <Analyser::Static::PCCompatible::Model model>
class FlowController {
public:
FlowController(Registers &registers, Segments &segments) :
registers_(registers), segments_(segments) {}
static constexpr auto x86_model = processor_model(model);
// Requirements for perform.
template <typename AddressT>
void jump(AddressT address) {
static_assert(std::is_same_v<AddressT, uint16_t>);
registers_.ip() = address;
}
public:
FlowController(Registers<x86_model> &registers, Segments<x86_model> &segments) :
registers_(registers), segments_(segments) {}
template <typename AddressT>
void jump(uint16_t segment, AddressT address) {
static_assert(std::is_same_v<AddressT, uint16_t>);
registers_.cs() = segment;
segments_.did_update(Segments::Source::CS);
registers_.ip() = address;
}
// Requirements for perform.
template <typename AddressT>
void jump(AddressT address) {
static_assert(std::is_same_v<AddressT, uint16_t>);
registers_.ip() = address;
}
void halt() {
halted_ = true;
}
void wait() {
log.error().append("WAIT ????");
}
template <typename AddressT>
void jump(const uint16_t segment, const AddressT address) {
static_assert(std::is_same_v<AddressT, uint16_t>);
registers_.cs() = segment;
segments_.did_update(InstructionSet::x86::Source::CS);
registers_.ip() = address;
}
void repeat_last() {
should_repeat_ = true;
}
void halt() {
halted_ = true;
}
void wait() {
log.error().append("WAIT ????");
}
// Other actions.
void begin_instruction() {
should_repeat_ = false;
}
bool should_repeat() const {
return should_repeat_;
}
void repeat_last() {
should_repeat_ = true;
}
void unhalt() {
halted_ = false;
}
bool halted() const {
return halted_;
}
// Other actions.
void begin_instruction() {
should_repeat_ = false;
}
bool should_repeat() const {
return should_repeat_;
}
private:
Registers &registers_;
Segments &segments_;
bool should_repeat_ = false;
bool halted_ = false;
void unhalt() {
halted_ = false;
}
bool halted() const {
return halted_;
}
private:
Registers<x86_model> &registers_;
Segments<x86_model> &segments_;
bool should_repeat_ = false;
bool halted_ = false;
};
template <Target::VideoAdaptor video, Target::ModelApproximation pc_model>
template <Analyser::Static::PCCompatible::Model pc_model, Target::VideoAdaptor video>
class ConcreteMachine:
public Machine,
public MachineTypes::TimedMachine,
@@ -921,7 +939,7 @@ class ConcreteMachine:
default:
request = request && ROM::Request(biosXT) && ROM::Request(tickXT);
break;
case PCModelApproximation::AT:
case Analyser::Static::PCCompatible::Model::AT:
request = request && ROM::Request(biosAT);
break;
}
@@ -943,7 +961,7 @@ class ConcreteMachine:
}
} break;
case PCModelApproximation::AT:
case Analyser::Static::PCCompatible::Model::AT:
const auto &bios_contents = roms.find(biosAT)->second;
context_.memory.install(0x10'0000 - bios_contents.size(), bios_contents.data(), bios_contents.size());
break;
@@ -964,7 +982,7 @@ class ConcreteMachine:
// MARK: - TimedMachine.
void run_for(const Cycles duration) final {
const auto pit_ticks = duration.as<int>();
constexpr bool is_fast = pc_model >= Target::ModelApproximation::TurboXT;
constexpr bool is_fast = pc_model >= Analyser::Static::PCCompatible::Model::TurboXT;
int ticks;
if constexpr (is_fast) {
@@ -1167,30 +1185,33 @@ class ConcreteMachine:
}
private:
PIC pic_;
DMA dma_;
static constexpr auto x86_model = processor_model(pc_model);
PIC<pc_model> pic_;
DMA<pc_model> dma_;
PCSpeaker speaker_;
Video video_;
KeyboardController keyboard_;
FloppyController fdc_;
PITObserver pit_observer_;
i8255PortHandler ppi_handler_;
KeyboardController<pc_model> keyboard_;
FloppyController<pc_model> fdc_;
PITObserver<pc_model> pit_observer_;
i8255PortHandler<pc_model> ppi_handler_;
PIT pit_;
PPI ppi_;
PIT<pc_model> pit_;
PPI<pc_model> ppi_;
RTC rtc_;
PCCompatible::KeyboardMapper keyboard_mapper_;
struct Context {
Context(
PIT &pit,
DMA &dma,
PPI &ppi,
PIC &pic,
PIT<pc_model> &pit,
DMA<pc_model> &dma,
PPI<pc_model> &ppi,
PIC<pc_model> &pic,
typename Adaptor<video>::type &card,
FloppyController &fdc, RTC &rtc
FloppyController<pc_model> &fdc,
RTC &rtc
) :
segments(registers),
memory(registers, segments),
@@ -1206,11 +1227,11 @@ class ConcreteMachine:
}
InstructionSet::x86::Flags flags;
Registers registers;
Segments segments;
Memory memory;
FlowController flow_controller;
IO<video> io;
Registers<x86_model> registers;
Segments<x86_model> segments;
Memory<pc_model> memory;
FlowController<pc_model> flow_controller;
IO<pc_model, video> io;
static constexpr auto model = processor_model(pc_model);
} context_;
@@ -1233,17 +1254,17 @@ static constexpr bool ForceAT = false;
template <Target::VideoAdaptor video>
std::unique_ptr<Machine> machine(const Target &target, const ROMMachine::ROMFetcher &rom_fetcher) {
switch(ForceAT ? PCModelApproximation::AT : target.model) {
case PCModelApproximation::XT:
return std::make_unique<PCCompatible::ConcreteMachine<video, PCModelApproximation::XT>>
switch(ForceAT ? Analyser::Static::PCCompatible::Model::AT : target.model) {
case Analyser::Static::PCCompatible::Model::XT:
return std::make_unique<PCCompatible::ConcreteMachine<Analyser::Static::PCCompatible::Model::XT, video>>
(target, rom_fetcher);
case PCModelApproximation::TurboXT:
return std::make_unique<PCCompatible::ConcreteMachine<video, PCModelApproximation::TurboXT>>
case Analyser::Static::PCCompatible::Model::TurboXT:
return std::make_unique<PCCompatible::ConcreteMachine<Analyser::Static::PCCompatible::Model::TurboXT, video>>
(target, rom_fetcher);
case PCModelApproximation::AT:
return std::make_unique<PCCompatible::ConcreteMachine<video, PCModelApproximation::AT>>
case Analyser::Static::PCCompatible::Model::AT:
return std::make_unique<PCCompatible::ConcreteMachine<Analyser::Static::PCCompatible::Model::AT, video>>
(target, rom_fetcher);
}
}
Machines/PCCompatible/PIC.hpp
+3
View File
@@ -8,9 +8,12 @@
#pragma once
#include "Analyser/Static/PCCompatible/Target.hpp"
namespace PCCompatible {
// Cf. https://helppc.netcore2k.net/hardware/pic
template <Analyser::Static::PCCompatible::Model model>
class PIC {
public:
template <int address>
Machines/PCCompatible/ProcessorByModel.hpp
+23
View File
@@ -0,0 +1,23 @@
//
// ProcessorByModel.hpp
// Clock Signal
//
// Created by Thomas Harte on 04/03/2025.
// Copyright © 2025 Thomas Harte. All rights reserved.
//
#pragma once
#include "Analyser/Static/PCCompatible/Target.hpp"
#include "InstructionSets/x86/Model.hpp"
namespace PCCompatible {
constexpr InstructionSet::x86::Model processor_model(Analyser::Static::PCCompatible::Model model) {
switch(model) {
default: return InstructionSet::x86::Model::i8086;
case Analyser::Static::PCCompatible::Model::AT: return InstructionSet::x86::Model::i80286;
}
}
}
Machines/PCCompatible/Registers.hpp
+15 -1
View File
@@ -8,9 +8,15 @@
#pragma once
#include "InstructionSets/x86/Model.hpp"
namespace PCCompatible {
struct Registers {
template <InstructionSet::x86::Model>
struct Registers;
template <>
struct Registers<InstructionSet::x86::Model::i8086> {
public:
static constexpr bool is_32bit = false;
@@ -67,4 +73,12 @@ struct Registers {
uint16_t ip_;
};
template <>
struct Registers<InstructionSet::x86::Model::i80186>: public Registers<InstructionSet::x86::Model::i8086> {
};
template <>
struct Registers<InstructionSet::x86::Model::i80286>: public Registers<InstructionSet::x86::Model::i80186> {
};
}
Machines/PCCompatible/Segments.hpp
+4 -2
View File
@@ -11,12 +11,14 @@
#include "Registers.hpp"
#include "InstructionSets/x86/Instruction.hpp"
#include "InstructionSets/x86/Model.hpp"
namespace PCCompatible {
template <InstructionSet::x86::Model model>
class Segments {
public:
Segments(const Registers &registers) : registers_(registers) {}
Segments(const Registers<model> &registers) : registers_(registers) {}
using Source = InstructionSet::x86::Source;
@@ -49,7 +51,7 @@ class Segments {
}
private:
const Registers &registers_;
const Registers<model> &registers_;
};
}
OSBindings/Mac/Clock Signal.xcodeproj/project.pbxproj
+6
View File
@@ -290,6 +290,8 @@
4B1EC716255398B000A1F44B /* Sound.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B1EC714255398B000A1F44B /* Sound.cpp */; };
4B1EC717255398B000A1F44B /* Sound.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B1EC714255398B000A1F44B /* Sound.cpp */; };
4B1EDB451E39A0AC009D6819 /* chip.png in Resources */ = {isa = PBXBuildFile; fileRef = 4B1EDB431E39A0AC009D6819 /* chip.png */; };
4B1FBE202D77AAC500BAC888 /* ProcessorByModel.hpp in Resources */ = {isa = PBXBuildFile; fileRef = 4B1FBE1F2D77AAC500BAC888 /* ProcessorByModel.hpp */; };
4B1FBE212D77AAC500BAC888 /* ProcessorByModel.hpp in Resources */ = {isa = PBXBuildFile; fileRef = 4B1FBE1F2D77AAC500BAC888 /* ProcessorByModel.hpp */; };
4B2005432B804D6400420C5C /* ARMDecoderTests.mm in Sources */ = {isa = PBXBuildFile; fileRef = 4B2005422B804D6400420C5C /* ARMDecoderTests.mm */; };
4B2130E2273A7A0A008A77B4 /* Audio.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B2130E0273A7A0A008A77B4 /* Audio.cpp */; };
4B2130E3273A7A0A008A77B4 /* Audio.cpp in Sources */ = {isa = PBXBuildFile; fileRef = 4B2130E0273A7A0A008A77B4 /* Audio.cpp */; };
@@ -1451,6 +1453,7 @@
4B1EC714255398B000A1F44B /* Sound.cpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.cpp; path = Sound.cpp; sourceTree = "<group>"; };
4B1EC715255398B000A1F44B /* Sound.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = Sound.hpp; sourceTree = "<group>"; };
4B1EDB431E39A0AC009D6819 /* chip.png */ = {isa = PBXFileReference; lastKnownFileType = image.png; path = chip.png; sourceTree = "<group>"; };
4B1FBE1F2D77AAC500BAC888 /* ProcessorByModel.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = ProcessorByModel.hpp; sourceTree = "<group>"; };
4B2005402B804AA300420C5C /* OperationMapper.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = OperationMapper.hpp; sourceTree = "<group>"; };
4B2005422B804D6400420C5C /* ARMDecoderTests.mm */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.cpp.objcpp; path = ARMDecoderTests.mm; sourceTree = "<group>"; };
4B2005462B8BD7A500420C5C /* Registers.hpp */ = {isa = PBXFileReference; lastKnownFileType = sourcecode.cpp.h; path = Registers.hpp; sourceTree = "<group>"; };
@@ -2561,6 +2564,7 @@
425739362B051EA800B7D1E4 /* PCCompatible.hpp */,
4267A9C82B0D4EC2008A59BB /* PIC.hpp */,
4267A9C72B0C26FA008A59BB /* PIT.hpp */,
4B1FBE1F2D77AAC500BAC888 /* ProcessorByModel.hpp */,
423820142B1A23C200964EFE /* Registers.hpp */,
42EB81252B21788200429AF4 /* RTC.hpp */,
423820152B1A23E100964EFE /* Segments.hpp */,
@@ -5585,6 +5589,7 @@
4B79E4441E3AF38600141F11 /* cassette.png in Resources */,
4BB73EAC1B587A5100552FC2 /* MainMenu.xib in Resources */,
4B8FE21D1DA19D5F0090D3CE /* QuickLoadCompositeOptions.xib in Resources */,
4B1FBE202D77AAC500BAC888 /* ProcessorByModel.hpp in Resources */,
4B49F0A923346F7A0045E6A6 /* MacintoshOptions.xib in Resources */,
4B051C93266D9D6900CA44E8 /* ROMImages in Resources */,
4B79E4461E3AF38600141F11 /* floppy525.png in Resources */,
@@ -5809,6 +5814,7 @@
4BB299F01B587D8400A49093 /* trap4 in Resources */,
4B8DF6722550D91600F3433C /* CPUBIT.sfc in Resources */,
4BB299451B587D8400A49093 /* dcmay in Resources */,
4B1FBE212D77AAC500BAC888 /* ProcessorByModel.hpp in Resources */,
4BB299081B587D8400A49093 /* asln in Resources */,
4BB2996E1B587D8400A49093 /* laxa in Resources */,
4BB2990A1B587D8400A49093 /* aslzx in Resources */,
OSBindings/Mac/Clock Signal/Machine/StaticAnalyser/CSStaticAnalyser.mm
+2 -2
View File
@@ -302,8 +302,8 @@
case CSPCCompatibleVideoAdaptorCGA: target->adaptor = Target::VideoAdaptor::CGA; break;
}
switch(speed) {
case CSPCCompatibleSpeedOriginal: target->model = Target::ModelApproximation::XT; break;
case CSPCCompatibleSpeedTurbo: target->model = Target::ModelApproximation::TurboXT; break;
case CSPCCompatibleSpeedOriginal: target->model = Analyser::Static::PCCompatible::Model::XT; break;
case CSPCCompatibleSpeedTurbo: target->model = Analyser::Static::PCCompatible::Model::TurboXT; break;
}
_targets.push_back(std::move(target));
}
OSBindings/Qt/mainwindow.cpp
+2 -2
View File
@@ -1232,8 +1232,8 @@ void MainWindow::start_pc() {
auto target = std::make_unique<Target>();
switch(ui->pcSpeedComboBox->currentIndex()) {
default: target->model = Target::ModelApproximation::XT; break;
case 1: target->model = Target::ModelApproximation::TurboXT; break;
default: target->model = Analyser::Static::PCCompatible::Model::XT; break;
case 1: target->model = Analyser::Static::PCCompatible::Model::TurboXT; break;
}
switch(ui->pcVideoAdaptorComboBox->currentIndex()) {