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Clean up Memory.
This commit is contained in:
Thomas Harte
parent
e4fdf09149
commit
8d0deeb20e
@ -91,142 +91,149 @@ struct Registers {
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}
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};
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struct Memory {
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using AccessType = InstructionSet::x86::AccessType;
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public:
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using AccessType = InstructionSet::x86::AccessType;
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template <typename IntT, AccessType type> struct ReturnType;
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template <typename IntT, AccessType type> struct ReturnType;
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// Reads: return a value directly.
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template <typename IntT> struct ReturnType<IntT, AccessType::Read> { using type = IntT; };
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template <typename IntT> struct ReturnType<IntT, AccessType::PreauthorisedRead> { using type = IntT; };
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// Reads: return a value directly.
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template <typename IntT> struct ReturnType<IntT, AccessType::Read> { using type = IntT; };
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template <typename IntT> struct ReturnType<IntT, AccessType::PreauthorisedRead> { using type = IntT; };
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// Writes: return a reference.
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template <typename IntT> struct ReturnType<IntT, AccessType::Write> { using type = IntT &; };
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template <typename IntT> struct ReturnType<IntT, AccessType::ReadModifyWrite> { using type = IntT &; };
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template <typename IntT> struct ReturnType<IntT, AccessType::PreauthorisedWrite> { using type = IntT &; };
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// Writes: return a reference.
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template <typename IntT> struct ReturnType<IntT, AccessType::Write> { using type = IntT &; };
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template <typename IntT> struct ReturnType<IntT, AccessType::ReadModifyWrite> { using type = IntT &; };
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template <typename IntT> struct ReturnType<IntT, AccessType::PreauthorisedWrite> { using type = IntT &; };
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enum class Tag {
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Seeded,
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AccessExpected,
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Accessed,
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};
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std::unordered_map<uint32_t, Tag> tags;
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std::vector<uint8_t> memory;
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const Registers ®isters_;
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Memory(Registers ®isters) : registers_(registers) {
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memory.resize(1024*1024);
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}
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void clear() {
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tags.clear();
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}
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void seed(uint32_t address, uint8_t value) {
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memory[address] = value;
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tags[address] = Tag::Seeded;
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}
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void touch(uint32_t address) {
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tags[address] = Tag::AccessExpected;
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}
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uint32_t segment_base(InstructionSet::x86::Source segment) {
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uint32_t physical_address;
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using Source = InstructionSet::x86::Source;
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switch(segment) {
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default: physical_address = registers_.ds_; break;
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case Source::ES: physical_address = registers_.es_; break;
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case Source::CS: physical_address = registers_.cs_; break;
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case Source::SS: physical_address = registers_.ss_; break;
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// Constructor.
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Memory(Registers ®isters) : registers_(registers) {
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memory.resize(1024*1024);
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}
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return physical_address << 4;
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}
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void preauthorise_stack_write(uint32_t) {}
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void preauthorise_stack_read(uint32_t) {}
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void preauthorise_read(InstructionSet::x86::Source, uint16_t, uint32_t) {}
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void preauthorise_read(uint16_t, uint32_t) {}
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// Initialisation.
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void clear() {
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tags.clear();
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}
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// Entry point used by the flow controller so that it can mark up locations at which the flags were written,
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// so that defined-flag-only masks can be applied while verifying RAM contents.
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template <typename IntT, AccessType type>
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typename ReturnType<IntT, type>::type &access(InstructionSet::x86::Source segment, uint16_t address, Tag tag) {
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const uint32_t physical_address = (segment_base(segment) + address) & 0xf'ffff;
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return access<IntT, type>(physical_address, tag);
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}
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void seed(uint32_t address, uint8_t value) {
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memory[address] = value;
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tags[address] = Tag::Seeded;
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}
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// An additional entry point for the flow controller; on the original 8086 interrupt vectors aren't relative
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// to a selector, they're just at an absolute location.
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template <typename IntT, AccessType type>
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typename ReturnType<IntT, type>::type &access(uint32_t address, Tag tag) {
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// Check for address wraparound
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if(address >= 0x10'0001 - sizeof(IntT)) {
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if constexpr (std::is_same_v<IntT, uint8_t>) {
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address &= 0xf'ffff;
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} else {
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if(address == 0xf'ffff) {
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// This is a 16-bit access comprising the final byte in memory and the first.
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write_back_address_[0] = address;
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write_back_address_[1] = 0;
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void touch(uint32_t address) {
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tags[address] = Tag::AccessExpected;
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}
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// Preauthorisation call-ins.
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void preauthorise_stack_write(uint32_t) {}
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void preauthorise_stack_read(uint32_t) {}
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void preauthorise_read(InstructionSet::x86::Source, uint16_t, uint32_t) {}
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void preauthorise_read(uint16_t, uint32_t) {}
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// Access call-ins.
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// Accesses an address based on segment:offset.
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template <typename IntT, AccessType type>
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typename ReturnType<IntT, type>::type &access(InstructionSet::x86::Source segment, uint32_t address) {
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if constexpr (std::is_same_v<IntT, uint16_t>) {
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// If this is a 16-bit access that runs past the end of the segment, it'll wrap back
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// to the start. So the 16-bit value will need to be a local cache.
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if(address == 0xffff) {
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write_back_address_[0] = (segment_base(segment) + address) & 0xf'ffff;
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write_back_address_[1] = (write_back_address_[0] - 65535) & 0xf'ffff;
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write_back_value_ = memory[write_back_address_[0]] | (memory[write_back_address_[1]] << 8);
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return write_back_value_;
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} else {
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address &= 0xf'ffff;
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}
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}
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auto &value = access<IntT, type>(segment, address, Tag::Accessed);
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// If the CPU has indicated a write, it should be safe to fuzz the value now.
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if(type == AccessType::Write) {
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value = IntT(~0);
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}
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return value;
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}
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// Accesses an address based on physical location.
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template <typename IntT, AccessType type>
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typename ReturnType<IntT, type>::type &access(uint32_t address) {
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return access<IntT, type>(address, Tag::Accessed);
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}
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template <typename IntT>
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void write_back() {
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if constexpr (std::is_same_v<IntT, uint16_t>) {
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if(write_back_address_[0] != NoWriteBack) {
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memory[write_back_address_[0]] = write_back_value_ & 0xff;
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memory[write_back_address_[1]] = write_back_value_ >> 8;
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write_back_address_[0] = 0;
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}
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}
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}
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if(tags.find(address) == tags.end()) {
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printf("Access to unexpected RAM address");
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}
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tags[address] = tag;
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return *reinterpret_cast<IntT *>(&memory[address]);
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}
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private:
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enum class Tag {
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Seeded,
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AccessExpected,
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Accessed,
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};
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// Entry point for the 8086; simply notes that memory was accessed.
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template <typename IntT, AccessType type>
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typename ReturnType<IntT, type>::type &access(InstructionSet::x86::Source segment, uint32_t address) {
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if constexpr (std::is_same_v<IntT, uint16_t>) {
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// If this is a 16-bit access that runs past the end of the segment, it'll wrap back
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// to the start. So the 16-bit value will need to be a local cache.
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if(address == 0xffff) {
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write_back_address_[0] = (segment_base(segment) + address) & 0xf'ffff;
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write_back_address_[1] = (write_back_address_[0] - 65535) & 0xf'ffff;
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write_back_value_ = memory[write_back_address_[0]] | (memory[write_back_address_[1]] << 8);
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return write_back_value_;
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std::unordered_map<uint32_t, Tag> tags;
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std::vector<uint8_t> memory;
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const Registers ®isters_;
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uint32_t segment_base(InstructionSet::x86::Source segment) {
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uint32_t physical_address;
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using Source = InstructionSet::x86::Source;
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switch(segment) {
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default: physical_address = registers_.ds_; break;
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case Source::ES: physical_address = registers_.es_; break;
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case Source::CS: physical_address = registers_.cs_; break;
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case Source::SS: physical_address = registers_.ss_; break;
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}
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}
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auto &value = access<IntT, type>(segment, address, Tag::Accessed);
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// If the CPU has indicated a write, it should be safe to fuzz the value now.
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if(type == AccessType::Write) {
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value = IntT(~0);
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return physical_address << 4;
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}
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return value;
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}
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template <typename IntT, AccessType type>
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typename ReturnType<IntT, type>::type &access(uint32_t address) {
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return access<IntT, type>(address, Tag::Accessed);
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}
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// Entry point used by the flow controller so that it can mark up locations at which the flags were written,
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// so that defined-flag-only masks can be applied while verifying RAM contents.
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template <typename IntT, AccessType type>
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typename ReturnType<IntT, type>::type &access(InstructionSet::x86::Source segment, uint16_t address, Tag tag) {
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const uint32_t physical_address = (segment_base(segment) + address) & 0xf'ffff;
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return access<IntT, type>(physical_address, tag);
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}
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template <typename IntT>
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void write_back() {
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if constexpr (std::is_same_v<IntT, uint16_t>) {
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if(write_back_address_[0] != NoWriteBack) {
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memory[write_back_address_[0]] = write_back_value_ & 0xff;
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memory[write_back_address_[1]] = write_back_value_ >> 8;
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write_back_address_[0] = 0;
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// An additional entry point for the flow controller; on the original 8086 interrupt vectors aren't relative
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// to a selector, they're just at an absolute location.
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template <typename IntT, AccessType type>
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typename ReturnType<IntT, type>::type &access(uint32_t address, Tag tag) {
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// Check for address wraparound
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if(address > 0x10'0000 - sizeof(IntT)) {
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if constexpr (std::is_same_v<IntT, uint8_t>) {
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address &= 0xf'ffff;
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} else {
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address &= 0xf'ffff;
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if(address == 0xf'ffff) {
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// This is a 16-bit access comprising the final byte in memory and the first.
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write_back_address_[0] = address;
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write_back_address_[1] = 0;
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write_back_value_ = memory[write_back_address_[0]] | (memory[write_back_address_[1]] << 8);
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return write_back_value_;
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}
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}
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}
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}
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}
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static constexpr uint32_t NoWriteBack = 0; // A low byte address of 0 can't require write-back.
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uint32_t write_back_address_[2] = {NoWriteBack, NoWriteBack};
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uint16_t write_back_value_;
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if(tags.find(address) == tags.end()) {
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printf("Access to unexpected RAM address");
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}
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tags[address] = tag;
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return *reinterpret_cast<IntT *>(&memory[address]);
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}
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static constexpr uint32_t NoWriteBack = 0; // A low byte address of 0 can't require write-back.
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uint32_t write_back_address_[2] = {NoWriteBack, NoWriteBack};
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uint16_t write_back_value_;
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};
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struct IO {
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template <typename IntT> void out([[maybe_unused]] uint16_t port, [[maybe_unused]] IntT value) {}
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@ -524,8 +531,9 @@ struct FailedExecution {
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int mask_position = 0;
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for(NSArray<NSNumber *> *ram in final_state[@"ram"]) {
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const uint32_t address = [ram[0] intValue];
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const auto value = execution_support.memory.access<uint8_t, Memory::AccessType::Read>(address);
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if((mask_position != 1) && execution_support.memory.memory[address] == [ram[1] intValue]) {
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if((mask_position != 1) && value == [ram[1] intValue]) {
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continue;
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}
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@ -535,7 +543,7 @@ struct FailedExecution {
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while(mask_position < 2) {
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const uint8_t mask = mask_position ? (flags_mask >> 8) : (flags_mask & 0xff);
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++mask_position;
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if((execution_support.memory.memory[address] & mask) == ([ram[1] intValue] & mask)) {
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if((value & mask) == ([ram[1] intValue] & mask)) {
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matched_with_mask = true;
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break;
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}
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