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Merge pull request #836 from TomHarte/Vic20Tests
Corrects a couple of minor VIA timer issues
This commit is contained in:
Thomas Harte
GitHub
commit
8fc3496cc9
@ -8,6 +8,10 @@
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#include "../../../Outputs/Log.hpp"
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// As-yet unimplemented (incomplete list):
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//
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// PB6 count-down mode for timer 2.
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namespace MOS {
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namespace MOS6522 {
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@ -34,7 +38,7 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
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address &= 0xf;
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access(address);
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switch(address) {
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case 0x0: // Write Port B.
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case 0x0: // Write Port B. ('ORB')
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// Store locally and communicate outwards.
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registers_.output[1] = value;
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@ -45,7 +49,7 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
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reevaluate_interrupts();
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break;
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case 0xf:
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case 0x1: // Write Port A.
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case 0x1: // Write Port A. ('ORA')
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registers_.output[0] = value;
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bus_handler_.run_for(time_since_bus_handler_call_.flush<HalfCycles>());
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@ -59,28 +63,38 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
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reevaluate_interrupts();
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break;
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case 0x2: // Port B direction.
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case 0x2: // Port B direction ('DDRB').
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registers_.data_direction[1] = value;
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break;
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case 0x3: // Port A direction.
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case 0x3: // Port A direction ('DDRA').
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registers_.data_direction[0] = value;
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break;
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// Timer 1
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case 0x6: case 0x4: registers_.timer_latch[0] = (registers_.timer_latch[0]&0xff00) | value; break;
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case 0x5: case 0x7:
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case 0x6: case 0x4: // ('T1L-L' and 'T1C-L')
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registers_.timer_latch[0] = (registers_.timer_latch[0]&0xff00) | value;
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break;
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case 0x7: // Timer 1 latch, high ('T1L-H').
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registers_.timer_latch[0] = (registers_.timer_latch[0]&0x00ff) | uint16_t(value << 8);
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break;
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case 0x5: // Timer 1 counter, high ('T1C-H').
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// Fill latch.
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registers_.timer_latch[0] = (registers_.timer_latch[0]&0x00ff) | uint16_t(value << 8);
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// Restart timer.
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registers_.next_timer[0] = registers_.timer_latch[0];
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timer_is_running_[0] = true;
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// Clear existing interrupt flag.
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registers_.interrupt_flags &= ~InterruptFlag::Timer1;
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if(address == 0x05) {
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registers_.next_timer[0] = registers_.timer_latch[0];
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timer_is_running_[0] = true;
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}
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reevaluate_interrupts();
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break;
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// Timer 2
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case 0x8: registers_.timer_latch[1] = value; break;
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case 0x9:
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case 0x8: // ('T2C-L')
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registers_.timer_latch[1] = value;
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break;
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case 0x9: // ('T2C-H')
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registers_.interrupt_flags &= ~InterruptFlag::Timer2;
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registers_.next_timer[1] = registers_.timer_latch[1] | uint16_t(value << 8);
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timer_is_running_[1] = true;
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@ -88,7 +102,7 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
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break;
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// Shift
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case 0xa:
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case 0xa: // ('SR')
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registers_.shift = value;
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shift_bits_remaining_ = 8;
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registers_.interrupt_flags &= ~InterruptFlag::ShiftRegister;
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@ -96,11 +110,11 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
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break;
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// Control
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case 0xb:
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case 0xb: // Auxiliary control ('ACR').
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registers_.auxiliary_control = value;
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evaluate_cb2_output();
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break;
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case 0xc: {
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case 0xc: { // Peripheral control ('PCR').
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// const auto old_peripheral_control = registers_.peripheral_control;
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registers_.peripheral_control = value;
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@ -141,11 +155,11 @@ template <typename T> void MOS6522<T>::write(int address, uint8_t value) {
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} break;
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// Interrupt control
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case 0xd:
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case 0xd: // Interrupt flag regiser ('IFR').
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registers_.interrupt_flags &= ~value;
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reevaluate_interrupts();
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break;
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case 0xe:
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case 0xe: // Interrupt enable register ('IER').
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if(value&0x80)
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registers_.interrupt_enable |= value;
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else
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@ -159,46 +173,46 @@ template <typename T> uint8_t MOS6522<T>::read(int address) {
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address &= 0xf;
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access(address);
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switch(address) {
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case 0x0:
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case 0x0: // Read Port B ('IRB').
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registers_.interrupt_flags &= ~(InterruptFlag::CB1ActiveEdge | InterruptFlag::CB2ActiveEdge);
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reevaluate_interrupts();
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return get_port_input(Port::B, registers_.data_direction[1], registers_.output[1]);
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case 0xf:
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case 0x1:
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case 0x1: // Read Port A ('IRA').
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registers_.interrupt_flags &= ~(InterruptFlag::CA1ActiveEdge | InterruptFlag::CA2ActiveEdge);
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reevaluate_interrupts();
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return get_port_input(Port::A, registers_.data_direction[0], registers_.output[0]);
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case 0x2: return registers_.data_direction[1];
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case 0x3: return registers_.data_direction[0];
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case 0x2: return registers_.data_direction[1]; // Port B direction ('DDRB').
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case 0x3: return registers_.data_direction[0]; // Port A direction ('DDRA').
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// Timer 1
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case 0x4:
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case 0x4: // Timer 1 low-order latches ('T1L-L').
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registers_.interrupt_flags &= ~InterruptFlag::Timer1;
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reevaluate_interrupts();
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return registers_.timer[0] & 0x00ff;
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case 0x5: return registers_.timer[0] >> 8;
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case 0x6: return registers_.timer_latch[0] & 0x00ff;
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case 0x7: return registers_.timer_latch[0] >> 8;
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case 0x5: return registers_.timer[0] >> 8; // Timer 1 high-order counter ('T1C-H')
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case 0x6: return registers_.timer_latch[0] & 0x00ff; // Timer 1 low-order latches ('T1L-L').
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case 0x7: return registers_.timer_latch[0] >> 8; // Timer 1 high-order latches ('T1L-H').
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// Timer 2
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case 0x8:
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case 0x8: // Timer 2 low-order counter ('T2C-L').
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registers_.interrupt_flags &= ~InterruptFlag::Timer2;
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reevaluate_interrupts();
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return registers_.timer[1] & 0x00ff;
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case 0x9: return registers_.timer[1] >> 8;
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case 0x9: return registers_.timer[1] >> 8; // Timer 2 high-order counter ('T2C-H').
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case 0xa:
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case 0xa: // Shift register ('SR').
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shift_bits_remaining_ = 8;
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registers_.interrupt_flags &= ~InterruptFlag::ShiftRegister;
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reevaluate_interrupts();
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return registers_.shift;
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case 0xb: return registers_.auxiliary_control;
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case 0xc: return registers_.peripheral_control;
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case 0xb: return registers_.auxiliary_control; // Auxiliary control ('ACR').
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case 0xc: return registers_.peripheral_control; // Peripheral control ('PCR').
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case 0xd: return registers_.interrupt_flags | (get_interrupt_line() ? 0x80 : 0x00);
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case 0xe: return registers_.interrupt_enable | 0x80;
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case 0xd: return registers_.interrupt_flags | (get_interrupt_line() ? 0x80 : 0x00); // Interrupt flag register ('IFR').
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case 0xe: return registers_.interrupt_enable | 0x80; // Interrupt enable register ('IER').
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}
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return 0xff;
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@ -276,10 +290,13 @@ template <typename T> void MOS6522<T>::do_phase2() {
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registers_.timer_needs_reload = false;
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registers_.timer[0] = registers_.timer_latch[0];
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} else {
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registers_.timer[0] --;
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-- registers_.timer[0];
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}
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registers_.timer[1] --;
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// Count down timer 2 if it is in timed interrupt mode (i.e. auxiliary control bit 5 is clear).
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// TODO: implement count down on PB6 if this bit isn't set.
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registers_.timer[1] -= 1 ^ ((registers_.auxiliary_control >> 5)&1);
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if(registers_.next_timer[0] >= 0) {
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registers_.timer[0] = uint16_t(registers_.next_timer[0]);
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registers_.next_timer[0] = -1;
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