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Decode MOVES.
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@ -512,6 +512,12 @@ template <typename Predecoder<model>::OpT op> uint32_t Predecoder<model>::invali
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return ~OneOperandMask<
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Ext
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>::value;
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case OpT(Operation::MOVESb): case OpT(Operation::MOVESw): case OpT(Operation::MOVESl):
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return ~TwoOperandMask<
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Ext,
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Ind | PostInc | PreDec | d16An | d8AnXn | XXXw | XXXl
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>::value;
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}
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//
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@ -1016,6 +1022,17 @@ template <typename Predecoder<model>::OpT op, bool validate> Preinstruction Pred
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//
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case OpT(Operation::MOVEfromC): case OpT(Operation::MOVEtoC):
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return validated<op, validate>(AddressingMode::ExtensionWord);
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//
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// MARK: MOVES
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//
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// b0–b2 and b3–b5: effective address;
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// also an extension word is present to dictate a a further register and a direction of transfer.
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//
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case OpT(Operation::MOVESb): case OpT(Operation::MOVESw): case OpT(Operation::MOVESl):
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return validated<op, validate>(
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AddressingMode::ExtensionWord, 0,
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combined_mode(ea_mode, ea_register), ea_register);
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}
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//
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@ -1230,8 +1247,13 @@ Preinstruction Predecoder<model>::decode0(uint16_t instruction) {
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// 4-83 (p187)
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case 0x00c: DecodeReq(model >= Model::M68020, Op::CMP2b);
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case 0x02c: DecodeReq(model >= Model::M68020, Op::CMP2w);
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case 0x04c: DecodeReq(model >= Model::M68020, Op::CMP2l);
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case 0x04c: DecodeReq(model >= Model::M68020, Op::CMP2w);
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case 0x08c: DecodeReq(model >= Model::M68020, Op::CMP2l);
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// 6-24 (p478)
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case 0xe00: DecodeReq(model >= Model::M68010, Op::MOVESb);
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case 0xe40: DecodeReq(model >= Model::M68010, Op::MOVESw);
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case 0xe80: DecodeReq(model >= Model::M68010, Op::MOVESl);
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default: break;
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}
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@ -96,6 +96,10 @@ const char *_to_string(Operation operation, bool is_quick) {
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case Operation::MOVEAw: return "MOVEA.w";
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case Operation::MOVEAl: return "MOVEA.l";
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case Operation::MOVESb: return "MOVES.b";
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case Operation::MOVESw: return "MOVES.w";
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case Operation::MOVESl: return "MOVES.l";
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case Operation::LEA: return "LEA";
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case Operation::PEA: return "PEA";
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@ -111,7 +111,7 @@ enum class Operation: uint8_t {
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MOVEfromCCR,
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MOVEtoC, MOVEfromC,
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MOVES,
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MOVESb, MOVESw, MOVESl,
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BKPT, RTD,
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//
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