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Formally prepare for one- and two-operand instructions.
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@ -114,6 +114,10 @@ template <Operation operation> Preinstruction Predecoder::decode(uint16_t instru
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AddressingMode::DataRegisterDirect, data_register);
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}
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//
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// MARK: MOVEfromSR, NBCD.
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//
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//
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// MARK: MULU, MULS, DIVU, DIVS.
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//
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@ -182,35 +182,41 @@ class Preinstruction {
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public:
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Operation operation = Operation::Undefined;
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// First operand.
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AddressingMode source_mode() {
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return AddressingMode(source_ & 0x1f);
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}
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int source() {
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return source_ >> 5;
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}
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// Instructions come with 0, 1 or 2 operands;
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// the getters below act to provide a list of operands
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// that is terminated by an AddressingMode::None.
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//
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// For two-operand instructions, argument 0 is a source
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// and argument 1 is a destination.
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//
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// For one-operand instructions, only argument 0 will
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// be provided, and will be a source and/or destination as
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// per the semantics of the operation.
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// Second operand.
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AddressingMode destination_mode() {
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return AddressingMode(destination_ & 0x1f);
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template <int index> AddressingMode mode() {
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if constexpr (index > 1) {
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return AddressingMode::None;
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}
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return AddressingMode(operands_[index] & 0x1f);
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}
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int destination() {
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return destination_ >> 5;
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template <int index> int reg() {
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if constexpr (index > 1) {
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return 0;
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}
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return operands_[index] >> 5;
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}
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private:
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uint8_t source_ = 0;
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uint8_t destination_ = 0;
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uint8_t operands_[2] = { uint8_t(AddressingMode::None), uint8_t(AddressingMode::None)};
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public:
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Preinstruction(
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Operation operation,
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AddressingMode source_mode,
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int source,
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AddressingMode destination_mode,
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int destination) : operation(operation) {
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source_ = uint8_t(source_mode) | uint8_t(source << 5);
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destination_ = uint8_t(destination_mode) | uint8_t(destination << 5);
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AddressingMode op1_mode, int op1_reg,
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AddressingMode op2_mode, int op2_reg) : operation(operation)
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{
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operands_[0] = uint8_t(op1_mode) | uint8_t(op1_reg << 5);
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operands_[1] = uint8_t(op2_mode) | uint8_t(op2_reg << 5);
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}
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Preinstruction() {}
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