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Added the basics necessary to get the CPU ticking over, at a nominal 4Mhz but with the wait states that I currently believe to be accurate.

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This commit is contained in:
Thomas Harte 2017-07-31 07:29:50 -04:00
parent 1d6fe11906
commit 9c04d851e4
3 changed files with 21 additions and 0 deletions
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8
ClockReceiver/ClockReceiver.hpp
View File

@ -95,9 +95,17 @@ template <class T> class WrappedInt {
return *static_cast<T *>(this);
}
inline T &operator &=(const T &rhs) {
length_ &= rhs.length_;
return *static_cast<T *>(this);
}
inline T operator +(const T &rhs) const { return T(length_ + rhs.length_); }
inline T operator -(const T &rhs) const { return T(length_ - rhs.length_); }
inline T operator %(const T &rhs) const { return T(length_ % rhs.length_); }
inline T operator &(const T &rhs) const { return T(length_ & rhs.length_); }
inline T operator -() const { return T(- length_); }
inline bool operator <(const T &rhs) const { return length_ < rhs.length_; }

10
Machines/AmstradCPC/AmstradCPC.cpp
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@ -10,7 +10,16 @@
using namespace AmstradCPC;
Machine::Machine() {
// primary clock is 4Mhz
set_clock_rate(4000000);
}
HalfCycles Machine::perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle) {
// Amstrad CPC timing scheme: assert WAIT for three out of four cycles
clock_offset_ = (clock_offset_ + cycle.length) & HalfCycles(7);
set_wait_line(clock_offset_ >= HalfCycles(2));
return HalfCycles(0);
}
@ -38,6 +47,7 @@ std::shared_ptr<Outputs::Speaker> Machine::get_speaker() {
}
void Machine::run_for(const Cycles cycles) {
CPU::Z80::Processor<Machine>::run_for(cycles);
}
void Machine::configure_as_target(const StaticAnalyser::Target &target) {

3
Machines/AmstradCPC/AmstradCPC.hpp
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@ -22,6 +22,8 @@ class Machine:
public CRTMachine::Machine,
public ConfigurationTarget::Machine {
public:
Machine();
HalfCycles perform_machine_cycle(const CPU::Z80::PartialMachineCycle &cycle);
void flush();
@ -37,6 +39,7 @@ class Machine:
private:
std::shared_ptr<Outputs::CRT::CRT> crt_;
HalfCycles clock_offset_;
};
}