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@ -33,71 +33,75 @@ constexpr char TestSuiteHome[] = "/Users/tharte/Projects/ProcessorTests/8088/v1"
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using Flags = InstructionSet::x86::Flags;
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struct Registers {
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CPU::RegisterPair16 ax_;
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uint8_t &al() { return ax_.halves.low; }
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uint8_t &ah() { return ax_.halves.high; }
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uint16_t &ax() { return ax_.full; }
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public:
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static constexpr bool is_32bit = false;
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CPU::RegisterPair16 &axp() { return ax_; }
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uint8_t &al() { return ax_.halves.low; }
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uint8_t &ah() { return ax_.halves.high; }
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uint16_t &ax() { return ax_.full; }
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CPU::RegisterPair16 cx_;
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uint8_t &cl() { return cx_.halves.low; }
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uint8_t &ch() { return cx_.halves.high; }
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uint16_t &cx() { return cx_.full; }
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CPU::RegisterPair16 &axp() { return ax_; }
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CPU::RegisterPair16 dx_;
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uint8_t &dl() { return dx_.halves.low; }
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uint8_t &dh() { return dx_.halves.high; }
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uint16_t &dx() { return dx_.full; }
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uint8_t &cl() { return cx_.halves.low; }
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uint8_t &ch() { return cx_.halves.high; }
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uint16_t &cx() { return cx_.full; }
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CPU::RegisterPair16 bx_;
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uint8_t &bl() { return bx_.halves.low; }
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uint8_t &bh() { return bx_.halves.high; }
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uint16_t &bx() { return bx_.full; }
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uint8_t &dl() { return dx_.halves.low; }
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uint8_t &dh() { return dx_.halves.high; }
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uint16_t &dx() { return dx_.full; }
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uint16_t sp_;
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uint16_t &sp() { return sp_; }
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uint8_t &bl() { return bx_.halves.low; }
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uint8_t &bh() { return bx_.halves.high; }
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uint16_t &bx() { return bx_.full; }
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uint16_t bp_;
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uint16_t &bp() { return bp_; }
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uint16_t &sp() { return sp_; }
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uint16_t &bp() { return bp_; }
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uint16_t &si() { return si_; }
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uint16_t &di() { return di_; }
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uint16_t si_;
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uint16_t &si() { return si_; }
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uint16_t ip_;
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uint16_t &ip() { return ip_; }
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uint16_t di_;
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uint16_t &di() { return di_; }
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uint16_t &es() { return es_; }
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uint16_t &cs() { return cs_; }
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uint16_t &ds() { return ds_; }
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uint16_t &ss() { return ss_; }
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uint16_t es_, cs_, ds_, ss_;
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const uint16_t es() const { return es_; }
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const uint16_t cs() const { return cs_; }
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const uint16_t ds() const { return ds_; }
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const uint16_t ss() const { return ss_; }
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uint16_t ip_;
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uint16_t &ip() { return ip_; }
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bool operator ==(const Registers &rhs) const {
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return
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ax_.full == rhs.ax_.full &&
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cx_.full == rhs.cx_.full &&
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dx_.full == rhs.dx_.full &&
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bx_.full == rhs.bx_.full &&
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sp_ == rhs.sp_ &&
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bp_ == rhs.bp_ &&
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si_ == rhs.si_ &&
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di_ == rhs.di_ &&
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es_ == rhs.es_ &&
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cs_ == rhs.cs_ &&
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ds_ == rhs.ds_ &&
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si_ == rhs.si_ &&
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ip_ == rhs.ip_;
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}
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uint16_t &es() { return es_; }
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uint16_t &cs() { return cs_; }
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uint16_t &ds() { return ds_; }
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uint16_t &ss() { return ss_; }
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// TODO: make the below private and use a friend class for test population, to ensure Perform
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// is free of direct accesses.
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// private:
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CPU::RegisterPair16 ax_;
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CPU::RegisterPair16 cx_;
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CPU::RegisterPair16 dx_;
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CPU::RegisterPair16 bx_;
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const uint16_t es() const { return es_; }
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const uint16_t cs() const { return cs_; }
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const uint16_t ds() const { return ds_; }
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const uint16_t ss() const { return ss_; }
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bool operator ==(const Registers &rhs) const {
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return
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ax_.full == rhs.ax_.full &&
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cx_.full == rhs.cx_.full &&
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dx_.full == rhs.dx_.full &&
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bx_.full == rhs.bx_.full &&
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sp_ == rhs.sp_ &&
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bp_ == rhs.bp_ &&
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si_ == rhs.si_ &&
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di_ == rhs.di_ &&
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es_ == rhs.es_ &&
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cs_ == rhs.cs_ &&
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ds_ == rhs.ds_ &&
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si_ == rhs.si_ &&
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ip_ == rhs.ip_;
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}
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uint16_t sp_;
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uint16_t bp_;
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uint16_t si_;
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uint16_t di_;
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uint16_t es_, cs_, ds_, ss_;
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};
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class Segments {
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public:
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@ -163,14 +167,14 @@ struct Memory {
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// Preauthorisation call-ins.
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//
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void preauthorise_stack_write(uint32_t length) {
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uint16_t sp = registers_.sp_;
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uint16_t sp = registers_.sp();
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while(length--) {
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--sp;
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preauthorise(InstructionSet::x86::Source::SS, sp);
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}
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}
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void preauthorise_stack_read(uint32_t length) {
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uint16_t sp = registers_.sp_;
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uint16_t sp = registers_.sp();
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while(length--) {
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preauthorise(InstructionSet::x86::Source::SS, sp);
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++sp;
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@ -261,7 +265,7 @@ struct Memory {
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std::unordered_set<uint32_t> preauthorisations;
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std::unordered_map<uint32_t, Tag> tags;
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std::vector<uint8_t> memory;
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const Registers ®isters_;
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Registers ®isters_;
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const Segments &segments_;
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void preauthorise(uint32_t address) {
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