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Add MOVEA, be slightly more careful about next_operand_.
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@ -20,7 +20,7 @@ namespace MC68000Mk2 {
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// TODO: BERR, interrupt inputs, etc; and obeying the trace flag.
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// Also, from Instruction.hpp:
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//
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// MOVEAw, MOVEAl
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// TRAP, TRAPV
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//
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// Not provided by a 68000: Bccl, BSRl
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@ -585,7 +585,9 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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StdCASE(EXTwtol, perform_state_ = Perform_np);
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StdCASE(MOVEb, perform_state_ = MOVE);
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Duplicate(MOVEAw, MOVEw)
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StdCASE(MOVEw, perform_state_ = MOVE);
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Duplicate(MOVEAl, MOVEl)
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StdCASE(MOVEl, perform_state_ = MOVE);
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StdCASE(CMPb, perform_state_ = Perform_np);
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@ -814,12 +816,10 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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StdCASE(LEA, {
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post_ea_state_ = LEA;
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next_operand_ = 0;
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MoveToStateSpecific(CalcEffectiveAddress);
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});
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StdCASE(PEA, {
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post_ea_state_ = PEA;
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next_operand_ = 0;
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MoveToStateSpecific(CalcEffectiveAddress);
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});
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@ -830,7 +830,6 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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// for the other cases.
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if(instruction_.mode(0) != Mode::DataRegisterDirect) {
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post_ea_state_ = TAS;
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next_operand_ = 0;
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MoveToStateSpecific(CalcEffectiveAddress);
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}
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@ -1439,9 +1438,13 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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//
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// Various generic forms of perform.
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//
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#define MoveToWritePhase() \
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next_operand_ = 0; \
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if(operand_flags_ & 0x0c) MoveToStateSpecific(StoreOperand) else MoveToStateSpecific(Decode)
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#define MoveToWritePhase() \
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if(operand_flags_ & 0x0c) { \
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next_operand_ = 0; \
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MoveToStateSpecific(StoreOperand); \
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} else { \
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MoveToStateSpecific(Decode); \
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}
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BeginState(Perform_np):
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PerformDynamic();
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@ -87,7 +87,7 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
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/// When fetching or storing operands, this is the next one to fetch
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/// or store.
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int next_operand_ = 0;
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int next_operand_ = -1;
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/// Storage for a temporary address, which can't be a local because it'll
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/// be used to populate microcycles, which may persist beyond an entry
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