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Codify MOVE's status somewhat, avoid reading write-only operands.
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@ -202,11 +202,14 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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//
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//
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// TODO: add MOVE special case, somewhere.
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// TODO: add MOVE special case, somewhere.
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case State::FetchOperand:
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case State::FetchOperand:
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switch(instruction_.mode(next_operand_)) {
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// Check that this operand is meant to be fetched.
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case Mode::None:
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if(!(operand_flags_ & (1 << next_operand_))) {
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state_ = perform_state_;
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state_ = perform_state_;
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continue;
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continue;
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}
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// Figure out how to fetch it.
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switch(instruction_.mode(next_operand_)) {
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case Mode::AddressRegisterDirect:
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case Mode::AddressRegisterDirect:
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case Mode::DataRegisterDirect:
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case Mode::DataRegisterDirect:
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operand_[next_operand_] = registers_[instruction_.lreg(next_operand_)];
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operand_[next_operand_] = registers_[instruction_.lreg(next_operand_)];
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@ -295,6 +298,10 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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switch(instruction_.operation) {
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switch(instruction_.operation) {
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BIND(NBCD, instruction_.mode(0) == Mode::DataRegisterDirect ? State::Perform_np_n : State::Perform_np);
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BIND(NBCD, instruction_.mode(0) == Mode::DataRegisterDirect ? State::Perform_np_n : State::Perform_np);
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// MOVEs are a special case for having an operand they write but did not read. So they segue into a
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// specialised state for writing the result.
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BIND(MOVEw, State::MOVEWrite);
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default:
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default:
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assert(false);
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assert(false);
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}
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}
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@ -37,6 +37,10 @@ struct ProcessorBase: public InstructionSet::M68k::NullFlowController {
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Perform_np = -6,
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Perform_np = -6,
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Perform_np_n = -7,
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Perform_np_n = -7,
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// MOVE has unique bus usage, so has a specialised state.
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MOVEWrite = -8,
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};
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};
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int state_ = State::Reset;
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int state_ = State::Reset;
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