6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2025-01-27 06:35:04 +00:00
Code Issues Projects Releases Wiki Activity

Corrects INC and DEC.

Browse Source
This commit is contained in:
Thomas Harte 2020-10-09 22:04:25 -04:00
parent 968166b06d
commit b439f40fe2
2 changed files with 7 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Processors/6502/AllRAM/6502AllRAM.cpp
View File

@ -11,7 +11,7 @@
#include <algorithm>
#include <cstring>
#define BE_NOISY
//#define BE_NOISY
using namespace CPU::MOS6502;
@ -45,14 +45,14 @@ template <Type type> class ConcreteAllRAMProcessor: public AllRAMProcessor, publ
*value = memory_[address];
#ifdef BE_NOISY
// if((address&0xff00) == 0x100) {
// printf("%04x -> %02x\n", address, *value);
printf("%04x -> %02x\n", address, *value);
// }
#endif
} else {
memory_[address] = *value;
#ifdef BE_NOISY
// if((address&0xff00) == 0x100) {
// printf("%04x <- %02x\n", address, *value);
printf("%04x <- %02x\n", address, *value);
// }
#endif
}

8
Processors/65816/Implementation/65816Implementation.hpp
View File

@ -577,13 +577,13 @@ template <typename BusHandler> void Processor<BusHandler>::run_for(const Cycles
//
case INC:
++instruction_buffer_.value;
flags_.set_nz(instruction_buffer_.value, m_shift_);
++data_buffer_.value;
flags_.set_nz(data_buffer_.value, m_shift_);
break;;
case DEC:
--instruction_buffer_.value;
flags_.set_nz(instruction_buffer_.value, m_shift_);
--data_buffer_.value;
flags_.set_nz(data_buffer_.value, m_shift_);
break;
case INX: {