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Prove that new output errors are [probably] external to the Blitter.

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This commit is contained in:
Thomas Harte 2022-08-15 11:10:17 -04:00
parent dcd66b93fd
commit bb54ac14b8
4 changed files with 23 additions and 4 deletions
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14
Machines/Amiga/Blitter.cpp
View File

@ -234,9 +234,19 @@ void Blitter<record_bus>::add_modulos() {
}
template <bool record_bus>
template <bool complete_immediately>
bool Blitter<record_bus>::advance_dma() {
if(!height_) return false;
// TODO: eliminate @c complete_immediately and this workaround.
// See commentary in Chipset.cpp.
if constexpr (complete_immediately) {
while(get_status() & 0x4000) {
advance_dma<false>();
}
return true;
}
if(line_mode_) {
not_zero_flag_ = false;
@ -551,3 +561,7 @@ std::vector<typename Blitter<record_bus>::Transaction> Blitter<record_bus>::get_
template class Amiga::Blitter<false>;
template class Amiga::Blitter<true>;
template bool Amiga::Blitter<true>::advance_dma<true>();
template bool Amiga::Blitter<true>::advance_dma<false>();
template bool Amiga::Blitter<false>::advance_dma<true>();
template bool Amiga::Blitter<false>::advance_dma<false>();

2
Machines/Amiga/Blitter.hpp
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@ -192,7 +192,7 @@ template <bool record_bus = false> class Blitter: public DMADevice<4, 4> {
uint16_t get_status();
bool advance_dma();
template <bool complete_immediately> bool advance_dma();
struct Transaction {
enum class Type {

7
Machines/Amiga/Chipset.cpp
View File

@ -654,8 +654,13 @@ template <int cycle, bool stop_if_cpu> bool Chipset::perform_cycle() {
}
// Give first refusal to the Blitter (if enabled), otherwise pass on to the CPU.
//
// TODO: determine why I see Blitter issues if I don't allow it to complete immediately.
// All tests pass without immediate completion, and immediate completion just runs the
// non-immediate version until the busy flag is disabled. So probably a scheduling or
// signalling issue out here.
constexpr auto BlitterEnabled = DMAFlag::AllBelow | DMAFlag::Blitter;
return (dma_control_ & BlitterEnabled) != BlitterEnabled || !blitter_.advance_dma();
return (dma_control_ & BlitterEnabled) != BlitterEnabled || !blitter_.advance_dma<true>();
}
/// Performs all slots starting with @c first_slot and ending just before @c last_slot.

4
OSBindings/Mac/Clock SignalTests/AmigaBlitterTests.mm
View File

@ -60,7 +60,7 @@ struct Chipset {
// Ensure all blitting is completed between register writes; none of the tests
// in this test set are about illegal usage.
while(blitter.get_status() & 0x4000) {
blitter.advance_dma();
blitter.advance_dma<false>();
}
const auto transactions = blitter.get_and_reset_transactions();
@ -190,7 +190,7 @@ struct Chipset {
return;
}
blitter.advance_dma();
blitter.advance_dma<false>();
const auto transactions = blitter.get_and_reset_transactions();
if(transactions.empty()) {