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Transcribe some notes.
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@ -94,6 +94,7 @@ struct Memory {
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high_rom_access_time_ = ROMAccessTime((address >> 6) & 3);
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high_rom_access_time_ = ROMAccessTime((address >> 6) & 3);
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low_rom_access_time_ = ROMAccessTime((address >> 4) & 3);
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low_rom_access_time_ = ROMAccessTime((address >> 4) & 3);
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page_size_ = PageSize((address >> 2) & 3);
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page_size_ = PageSize((address >> 2) & 3);
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update_mapping();
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logger.info().append("MEMC Control: %08x/%08x -> OS:%d sound:%d video:%d high:%d low:%d size:%d", address, source, os_mode_, sound_dma_enable_, video_dma_enable_, high_rom_access_time_, low_rom_access_time_, page_size_);
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logger.info().append("MEMC Control: %08x/%08x -> OS:%d sound:%d video:%d high:%d low:%d size:%d", address, source, os_mode_, sound_dma_enable_, video_dma_enable_, high_rom_access_time_, low_rom_access_time_, page_size_);
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@ -126,7 +127,8 @@ struct Memory {
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return true;
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return true;
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case Zone::AddressTranslator:
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case Zone::AddressTranslator:
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logger.error().append("TODO: Write address translator of %08x to %08x", source, address);
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pages_[address & 0x7f] = address;
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update_mapping();
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break;
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break;
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default:
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default:
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@ -166,6 +168,7 @@ struct Memory {
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break;
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break;
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case Zone::HighROM:
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case Zone::HighROM:
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// TODO: require A24=A25=0, then A25=1.
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has_moved_rom_ = true;
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has_moved_rom_ = true;
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source = high_rom<IntT>(address);
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source = high_rom<IntT>(address);
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return true;
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return true;
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@ -198,6 +201,11 @@ struct Memory {
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return true;
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return true;
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}
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}
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Memory() {
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// Install initial logical memory map.
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update_mapping();
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}
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private:
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private:
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bool has_moved_rom_ = false;
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bool has_moved_rom_ = false;
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std::array<uint8_t, 4*1024*1024> ram_{};
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std::array<uint8_t, 4*1024*1024> ram_{};
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@ -264,11 +272,30 @@ struct Memory {
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template <typename IntT, bool is_read>
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template <typename IntT, bool is_read>
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IntT *logical_ram(uint32_t address, InstructionSet::ARM::Mode) {
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IntT *logical_ram(uint32_t address, InstructionSet::ARM::Mode) {
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// TODO: (1) which logical page is this?
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logger.error().append("TODO: Logical RAM mapping at %08x", address);
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logger.error().append("TODO: Logical RAM mapping at %08x", address);
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// 4kb:
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// A[6:0] -> PPN[6:0]
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// A[11:10] -> LPN[12:11]; A[22:12] -> LPN[10:0]
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// 8kb:
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// A[0] -> PPN[6]; A[6:1] -> PPN[5:0]
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// A[11:10] -> LPN[11:10]; A[22:13] -> LPN[9:0]
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// 16kb:
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// A[1:0] -> PPN[6:5]; A[6:2] -> PPN[4:0]
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// A[11:10] -> LPN[10:9]; A[22:14] -> LPN[8:0]
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// 32kb:
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// A[1] -> PPN[6]; A[2] -> PPN[5]; A[0] -> PPN[4]; A[6:3] -> PPN[6:3]
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// A[11:10] -> LPN[9:8]; A[22:15] -> LPN[7:0]
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return nullptr;
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return nullptr;
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}
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}
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void update_mapping() {
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void update_mapping() {
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logger.error().append("TODO: Update logical RAM mapping");
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}
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}
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};
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};
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