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After much extra logging, corrects destination bank for MVN and MVP.
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@@ -145,11 +145,11 @@ template <typename BusHandler, bool uses_ready_line> void Processor<BusHandler,
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break;
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case CycleFetchBlockY:
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perform_bus(((instruction_buffer_.value & 0xff00) << 8) | registers_.y.full, &bus_throwaway_, MOS6502Esque::InternalOperationRead);
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perform_bus(((instruction_buffer_.value & 0x00ff) << 16) | registers_.y.full, &bus_throwaway_, MOS6502Esque::InternalOperationRead);
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break;
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case CycleStoreBlockY:
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write(((instruction_buffer_.value & 0xff00) << 8) | registers_.y.full, data_buffer_.any_byte());
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write(((instruction_buffer_.value & 0x00ff) << 16) | registers_.y.full, data_buffer_.any_byte());
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break;
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#undef increment_data_address
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