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https://github.com/TomHarte/CLK.git
synced 2026-04-26 19:17:52 +00:00
Corrects longstanding deviation from naming convention.
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@@ -33,18 +33,18 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const {
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case Register::L: return hl_.halves.low;
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case Register::HL: return hl_.full;
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case Register::ADash: return afDash_.halves.high;
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case Register::FlagsDash: return afDash_.halves.low;
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case Register::AFDash: return afDash_.full;
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case Register::BDash: return bcDash_.halves.high;
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case Register::CDash: return bcDash_.halves.low;
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case Register::BCDash: return bcDash_.full;
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case Register::DDash: return deDash_.halves.high;
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case Register::EDash: return deDash_.halves.low;
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case Register::DEDash: return deDash_.full;
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case Register::HDash: return hlDash_.halves.high;
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case Register::LDash: return hlDash_.halves.low;
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case Register::HLDash: return hlDash_.full;
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case Register::ADash: return af_dash_.halves.high;
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case Register::FlagsDash: return af_dash_.halves.low;
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case Register::AFDash: return af_dash_.full;
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case Register::BDash: return bc_dash_.halves.high;
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case Register::CDash: return bc_dash_.halves.low;
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case Register::BCDash: return bc_dash_.full;
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case Register::DDash: return de_dash_.halves.high;
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case Register::EDash: return de_dash_.halves.low;
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case Register::DEDash: return de_dash_.full;
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case Register::HDash: return hl_dash_.halves.high;
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case Register::LDash: return hl_dash_.halves.low;
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case Register::HLDash: return hl_dash_.full;
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case Register::IXh: return ix_.halves.high;
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case Register::IXl: return ix_.halves.low;
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@@ -86,18 +86,18 @@ void ProcessorBase::set_value_of_register(Register r, uint16_t value) {
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case Register::L: hl_.halves.low = uint8_t(value); break;
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case Register::HL: hl_.full = value; break;
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case Register::ADash: afDash_.halves.high = uint8_t(value); break;
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case Register::FlagsDash: afDash_.halves.low = uint8_t(value); break;
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case Register::AFDash: afDash_.full = value; break;
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case Register::BDash: bcDash_.halves.high = uint8_t(value); break;
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case Register::CDash: bcDash_.halves.low = uint8_t(value); break;
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case Register::BCDash: bcDash_.full = value; break;
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case Register::DDash: deDash_.halves.high = uint8_t(value); break;
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case Register::EDash: deDash_.halves.low = uint8_t(value); break;
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case Register::DEDash: deDash_.full = value; break;
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case Register::HDash: hlDash_.halves.high = uint8_t(value); break;
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case Register::LDash: hlDash_.halves.low = uint8_t(value); break;
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case Register::HLDash: hlDash_.full = value; break;
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case Register::ADash: af_dash_.halves.high = uint8_t(value); break;
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case Register::FlagsDash: af_dash_.halves.low = uint8_t(value); break;
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case Register::AFDash: af_dash_.full = value; break;
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case Register::BDash: bc_dash_.halves.high = uint8_t(value); break;
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case Register::CDash: bc_dash_.halves.low = uint8_t(value); break;
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case Register::BCDash: bc_dash_.full = value; break;
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case Register::DDash: de_dash_.halves.high = uint8_t(value); break;
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case Register::EDash: de_dash_.halves.low = uint8_t(value); break;
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case Register::DEDash: de_dash_.full = value; break;
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case Register::HDash: hl_dash_.halves.high = uint8_t(value); break;
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case Register::LDash: hl_dash_.halves.low = uint8_t(value); break;
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case Register::HLDash: hl_dash_.full = value; break;
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case Register::IXh: ix_.halves.high = uint8_t(value); break;
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case Register::IXl: ix_.halves.low = uint8_t(value); break;
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@@ -461,17 +461,17 @@ template < class T,
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case MicroOp::ExAFAFDash: {
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const uint8_t a = a_;
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const uint8_t f = get_flags();
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set_flags(afDash_.halves.low);
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a_ = afDash_.halves.high;
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afDash_.halves.high = a;
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afDash_.halves.low = f;
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set_flags(af_dash_.halves.low);
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a_ = af_dash_.halves.high;
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af_dash_.halves.high = a;
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af_dash_.halves.low = f;
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} break;
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case MicroOp::EXX: {
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uint16_t temp;
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swap(de_, deDash_);
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swap(bc_, bcDash_);
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swap(hl_, hlDash_);
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swap(de_, de_dash_);
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swap(bc_, bc_dash_);
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swap(hl_, hl_dash_);
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} break;
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#undef swap
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@@ -129,7 +129,7 @@ class ProcessorStorage {
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uint8_t a_;
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RegisterPair16 bc_, de_, hl_;
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RegisterPair16 afDash_, bcDash_, deDash_, hlDash_;
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RegisterPair16 af_dash_, bc_dash_, de_dash_, hl_dash_;
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RegisterPair16 ix_, iy_, pc_, sp_;
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RegisterPair16 ir_, refresh_addr_;
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bool iff1_ = false, iff2_ = false;
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