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mirror of https://github.com/TomHarte/CLK.git synced 2026-04-19 19:16:34 +00:00

Corrects possible confusion as documentation recommends Cycles(0) as default, but then gives Cycles(1).

This commit is contained in:
Thomas Harte
2017-09-01 20:49:24 -04:00
parent 615f7ce176
commit de218611e4
+1 -1
View File
@@ -93,7 +93,7 @@ class BusHandler {
Cycles(1) to describe lengthened bus cycles.
*/
Cycles perform_bus_operation(CPU::MOS6502::BusOperation operation, uint16_t address, uint8_t *value) {
return Cycles(0);
return Cycles(1);
}
/*!