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Correct ADDX/SUBX mode and register.
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@ -2012,9 +2012,9 @@ struct ProcessorStorageConstructor {
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case Decoder::ADDX_SUBX: {
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if(instruction & 0x8) {
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// Use predecrementing address registers.
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program.set_source(storage_, Ind, ea_register);
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program.set_destination(storage_, Ind, data_register);
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dumper.set_source_dest(Ind, 0, Ind, 0);
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program.set_source(storage_, PreDec, ea_register);
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program.set_destination(storage_, PreDec, data_register);
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dumper.set_source_dest(PreDec, ea_register, PreDec, data_register);
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if(is_long_word_access) {
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// Access order is very atypical here: it's lower parts each for both words,
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