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Correct ADDX/SUBX mode and register.

This commit is contained in:
Thomas Harte 2022-04-19 16:20:01 -04:00
parent cbf6ae81d0
commit e82f2a3810

View File

@ -2012,9 +2012,9 @@ struct ProcessorStorageConstructor {
case Decoder::ADDX_SUBX: {
if(instruction & 0x8) {
// Use predecrementing address registers.
program.set_source(storage_, Ind, ea_register);
program.set_destination(storage_, Ind, data_register);
dumper.set_source_dest(Ind, 0, Ind, 0);
program.set_source(storage_, PreDec, ea_register);
program.set_destination(storage_, PreDec, data_register);
dumper.set_source_dest(PreDec, ea_register, PreDec, data_register);
if(is_long_word_access) {
// Access order is very atypical here: it's lower parts each for both words,