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Eliminate type-in-function-name from 6502-world.

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This commit is contained in:
Thomas Harte 2023-05-10 18:53:38 -05:00
parent 3af30b1fec
commit f6acee18cc
14 changed files with 73 additions and 73 deletions
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32
Machines/Apple/AppleIIgs/AppleIIgs.cpp
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@ -395,13 +395,13 @@ class ConcreteMachine:
//
// printf("%06x a:%04x x:%04x y:%04x s:%04x d:%04x b:%04x\n",
// address,
// m65816_.get_value_of_register(CPU::WDC65816::Register::A),
// m65816_.get_value_of_register(CPU::WDC65816::Register::X),
// m65816_.get_value_of_register(CPU::WDC65816::Register::Y),
//// m65816_.get_value_of_register(CPU::WDC65816::Register::Flags),
// m65816_.get_value_of_register(CPU::WDC65816::Register::StackPointer),
// m65816_.get_value_of_register(CPU::WDC65816::Register::Direct),
// m65816_.get_value_of_register(CPU::WDC65816::Register::DataBank)
// m65816_.value_of(CPU::WDC65816::Register::A),
// m65816_.value_of(CPU::WDC65816::Register::X),
// m65816_.value_of(CPU::WDC65816::Register::Y),
//// m65816_.value_of(CPU::WDC65816::Register::Flags),
// m65816_.value_of(CPU::WDC65816::Register::StackPointer),
// m65816_.value_of(CPU::WDC65816::Register::Direct),
// m65816_.value_of(CPU::WDC65816::Register::DataBank)
// );
// }
@ -1009,15 +1009,15 @@ class ConcreteMachine:
printf("%06x %s %02x [%s]", address, isReadOperation(operation) ? "->" : "<-", *value, (is_1Mhz || (speed_register_ & motor_flags_)) ? "1.0" : "2.8");
if(operation == CPU::WDC65816::BusOperation::ReadOpcode) {
printf(" a:%04x x:%04x y:%04x s:%04x e:%d p:%02x db:%02x pb:%02x d:%04x [tot:%llu]\n",
m65816_.get_value_of_register(CPU::WDC65816::Register::A),
m65816_.get_value_of_register(CPU::WDC65816::Register::X),
m65816_.get_value_of_register(CPU::WDC65816::Register::Y),
m65816_.get_value_of_register(CPU::WDC65816::Register::StackPointer),
m65816_.get_value_of_register(CPU::WDC65816::Register::EmulationFlag),
m65816_.get_value_of_register(CPU::WDC65816::Register::Flags),
m65816_.get_value_of_register(CPU::WDC65816::Register::DataBank),
m65816_.get_value_of_register(CPU::WDC65816::Register::ProgramBank),
m65816_.get_value_of_register(CPU::WDC65816::Register::Direct),
m65816_.value_of(CPU::WDC65816::Register::A),
m65816_.value_of(CPU::WDC65816::Register::X),
m65816_.value_of(CPU::WDC65816::Register::Y),
m65816_.value_of(CPU::WDC65816::Register::StackPointer),
m65816_.value_of(CPU::WDC65816::Register::EmulationFlag),
m65816_.value_of(CPU::WDC65816::Register::Flags),
m65816_.value_of(CPU::WDC65816::Register::DataBank),
m65816_.value_of(CPU::WDC65816::Register::ProgramBank),
m65816_.value_of(CPU::WDC65816::Register::Direct),
static_cast<unsigned long long>(total)
);
} else printf("\n");

8
Machines/Commodore/Vic-20/Vic20.cpp
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@ -544,7 +544,7 @@ class ConcreteMachine:
*value = 0x0c; // i.e. NOP abs, to swallow the entire JSR
} else if(address == 0xf90b) {
uint8_t x = uint8_t(m6502_.get_value_of_register(CPU::MOS6502::Register::X));
uint8_t x = uint8_t(m6502_.value_of(CPU::MOS6502::Register::X));
if(x == 0xe) {
Storage::Tape::Commodore::Parser parser;
const uint64_t tape_position = tape_->get_tape()->get_offset();
@ -567,13 +567,13 @@ class ConcreteMachine:
// set tape status, carry and flag
ram_[0x90] |= 0x40;
uint8_t flags = uint8_t(m6502_.get_value_of_register(CPU::MOS6502::Register::Flags));
uint8_t flags = uint8_t(m6502_.value_of(CPU::MOS6502::Register::Flags));
flags &= ~uint8_t((CPU::MOS6502::Flag::Carry | CPU::MOS6502::Flag::Interrupt));
m6502_.set_value_of_register(CPU::MOS6502::Register::Flags, flags);
m6502_.set_value_of(CPU::MOS6502::Register::Flags, flags);
// to ensure that execution proceeds to 0xfccf, pretend a NOP was here and
// ensure that the PC leaps to 0xfccf
m6502_.set_value_of_register(CPU::MOS6502::Register::ProgramCounter, 0xfccf);
m6502_.set_value_of(CPU::MOS6502::Register::ProgramCounter, 0xfccf);
*value = 0xea; // i.e. NOP implied
hold_tape_ = true;
LOG("Vic-20: Found data");

6
Machines/Electron/Electron.cpp
View File

@ -421,7 +421,7 @@ template <bool has_scsi_bus> class ConcreteMachine:
// allow the PC read to return an RTS.
)
) {
const auto service_call = uint8_t(m6502_.get_value_of_register(CPU::MOS6502::Register::X));
const auto service_call = uint8_t(m6502_.value_of(CPU::MOS6502::Register::X));
if(address == 0xf0a8) {
if(!ram_[0x247] && service_call == 14) {
tape_.set_delegate(nullptr);
@ -441,8 +441,8 @@ template <bool has_scsi_bus> class ConcreteMachine:
interrupt_status_ |= tape_.get_interrupt_status();
fast_load_is_in_data_ = true;
m6502_.set_value_of_register(CPU::MOS6502::Register::A, 0);
m6502_.set_value_of_register(CPU::MOS6502::Register::Y, tape_.get_data_register());
m6502_.set_value_of(CPU::MOS6502::Register::A, 0);
m6502_.set_value_of(CPU::MOS6502::Register::Y, tape_.get_data_register());
*value = 0x60; // 0x60 is RTS
}
else *value = os_[address & 16383];

4
Machines/Oric/Oric.cpp
View File

@ -469,8 +469,8 @@ template <Analyser::Static::Oric::Target::DiskInterface disk_interface, CPU::MOS
!tape_player_.get_tape()->is_at_end()) {
uint8_t next_byte = tape_player_.get_next_byte(!ram_[tape_speed_address_]);
m6502_.set_value_of_register(CPU::MOS6502Esque::A, next_byte);
m6502_.set_value_of_register(CPU::MOS6502Esque::Flags, next_byte ? 0 : CPU::MOS6502::Flag::Zero);
m6502_.set_value_of(CPU::MOS6502Esque::A, next_byte);
m6502_.set_value_of(CPU::MOS6502Esque::Flags, next_byte ? 0 : CPU::MOS6502::Flag::Zero);
*value = 0x60; // i.e. RTS
}
} else {

44
OSBindings/Mac/Clock SignalTests/65816ComparativeTests.mm
View File

@ -93,8 +93,8 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandler<uint32_t> {
using Register = CPU::MOS6502Esque::Register;
const uint32_t pc =
processor.get_value_of_register(Register::ProgramCounter) |
(processor.get_value_of_register(Register::ProgramBank) << 16);
processor.value_of(Register::ProgramCounter) |
(processor.value_of(Register::ProgramBank) << 16);
inventions[pc] = ram[pc] = opcode;
}
@ -120,16 +120,16 @@ struct BusHandler: public CPU::MOS6502Esque::BusHandler<uint32_t> {
template <typename Processor> void print_registers(FILE *file, const Processor &processor, int pc_offset) {
using Register = CPU::MOS6502Esque::Register;
fprintf(file, "\"pc\": %d, ", (processor.get_value_of_register(Register::ProgramCounter) + pc_offset) & 65535);
fprintf(file, "\"s\": %d, ", processor.get_value_of_register(Register::StackPointer));
fprintf(file, "\"p\": %d, ", processor.get_value_of_register(Register::Flags));
fprintf(file, "\"a\": %d, ", processor.get_value_of_register(Register::A));
fprintf(file, "\"x\": %d, ", processor.get_value_of_register(Register::X));
fprintf(file, "\"y\": %d, ", processor.get_value_of_register(Register::Y));
fprintf(file, "\"dbr\": %d, ", processor.get_value_of_register(Register::DataBank));
fprintf(file, "\"d\": %d, ", processor.get_value_of_register(Register::Direct));
fprintf(file, "\"pbr\": %d, ", processor.get_value_of_register(Register::ProgramBank));
fprintf(file, "\"e\": %d, ", processor.get_value_of_register(Register::EmulationFlag));
fprintf(file, "\"pc\": %d, ", (processor.value_of(Register::ProgramCounter) + pc_offset) & 65535);
fprintf(file, "\"s\": %d, ", processor.value_of(Register::StackPointer));
fprintf(file, "\"p\": %d, ", processor.value_of(Register::Flags));
fprintf(file, "\"a\": %d, ", processor.value_of(Register::A));
fprintf(file, "\"x\": %d, ", processor.value_of(Register::X));
fprintf(file, "\"y\": %d, ", processor.value_of(Register::Y));
fprintf(file, "\"dbr\": %d, ", processor.value_of(Register::DataBank));
fprintf(file, "\"d\": %d, ", processor.value_of(Register::Direct));
fprintf(file, "\"pbr\": %d, ", processor.value_of(Register::ProgramBank));
fprintf(file, "\"e\": %d, ", processor.value_of(Register::EmulationFlag));
}
void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
@ -180,19 +180,19 @@ void print_ram(FILE *file, const std::unordered_map<uint32_t, uint8_t> &data) {
// Randomise most of the processor state...
using Register = CPU::MOS6502Esque::Register;
handler.processor.set_value_of_register(Register::A, rand() >> 8);
handler.processor.set_value_of_register(Register::Flags, rand() >> 8);
handler.processor.set_value_of_register(Register::X, rand() >> 8);
handler.processor.set_value_of_register(Register::Y, rand() >> 8);
handler.processor.set_value_of_register(Register::ProgramCounter, rand() >> 8);
handler.processor.set_value_of_register(Register::StackPointer, rand() >> 8);
handler.processor.set_value_of_register(Register::DataBank, rand() >> 8);
handler.processor.set_value_of_register(Register::ProgramBank, rand() >> 8);
handler.processor.set_value_of_register(Register::Direct, rand() >> 8);
handler.processor.set_value_of(Register::A, rand() >> 8);
handler.processor.set_value_of(Register::Flags, rand() >> 8);
handler.processor.set_value_of(Register::X, rand() >> 8);
handler.processor.set_value_of(Register::Y, rand() >> 8);
handler.processor.set_value_of(Register::ProgramCounter, rand() >> 8);
handler.processor.set_value_of(Register::StackPointer, rand() >> 8);
handler.processor.set_value_of(Register::DataBank, rand() >> 8);
handler.processor.set_value_of(Register::ProgramBank, rand() >> 8);
handler.processor.set_value_of(Register::Direct, rand() >> 8);
// ... except for emulation mode, which is a given.
// And is set last to ensure proper internal state is applied.
handler.processor.set_value_of_register(Register::EmulationFlag, is_emulated);
handler.processor.set_value_of(Register::EmulationFlag, is_emulated);
// Establish the opcode.
handler.setup(opcode);

4
OSBindings/Mac/Clock SignalTests/Bridges/TestMachine6502.mm
View File

@ -79,11 +79,11 @@ static CPU::MOS6502::Register registerForRegister(CSTestMachine6502Register reg)
}
- (void)setValue:(uint16_t)value forRegister:(CSTestMachine6502Register)reg {
_processor->set_value_of_register(registerForRegister(reg), value);
_processor->set_value_of(registerForRegister(reg), value);
}
- (uint16_t)valueForRegister:(CSTestMachine6502Register)reg {
return _processor->get_value_of_register(registerForRegister(reg));
return _processor->value_of(registerForRegister(reg));
}
- (void)setData:(NSData *)data atAddress:(uint32_t)startAddress {

8
Processors/6502/6502.hpp
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@ -59,22 +59,22 @@ class ProcessorBase: public ProcessorStorage {
/*!
Gets the value of a register.
@see set_value_of_register
@see set_value_of
@param r The register to set.
@returns The value of the register. 8-bit registers will be returned as unsigned.
*/
inline uint16_t get_value_of_register(Register r) const;
inline uint16_t value_of(Register r) const;
/*!
Sets the value of a register.
@see get_value_of_register
@see value_of
@param r The register to set.
@param value The value to set. If the register is only 8 bit, the value will be truncated.
*/
inline void set_value_of_register(Register r, uint16_t value);
inline void set_value_of(Register r, uint16_t value);
/*!
Sets the current level of the RST line.

18
Processors/6502/AllRAM/6502AllRAM.cpp
View File

@ -51,11 +51,11 @@ template <Type type, bool has_cias> class ConcreteAllRAMProcessor:
if(operation == BusOperation::ReadOpcode) {
if constexpr (LogProgramCounter) {
printf("[%04x] %02x a:%04x x:%04x y:%04x p:%02x s:%02x\n", address, memory_[address],
mos6502_.get_value_of_register(Register::A),
mos6502_.get_value_of_register(Register::X),
mos6502_.get_value_of_register(Register::Y),
mos6502_.get_value_of_register(Register::Flags) & 0xff,
mos6502_.get_value_of_register(Register::StackPointer) & 0xff);
mos6502_.value_of(Register::A),
mos6502_.value_of(Register::X),
mos6502_.value_of(Register::Y),
mos6502_.value_of(Register::Flags) & 0xff,
mos6502_.value_of(Register::StackPointer) & 0xff);
}
check_address_for_trap(address);
--instructions_;
@ -137,12 +137,12 @@ template <Type type, bool has_cias> class ConcreteAllRAMProcessor:
mos6502_.set_nmi_line(value);
}
uint16_t get_value_of_register(Register r) {
return mos6502_.get_value_of_register(r);
uint16_t value_of(Register r) {
return mos6502_.value_of(r);
}
void set_value_of_register(Register r, uint16_t value) {
mos6502_.set_value_of_register(r, value);
void set_value_of(Register r, uint16_t value) {
mos6502_.set_value_of(r, value);
}
private:

4
Processors/6502/AllRAM/6502AllRAM.hpp
View File

@ -25,8 +25,8 @@ class AllRAMProcessor:
virtual bool is_jammed() = 0;
virtual void set_irq_line(bool value) = 0;
virtual void set_nmi_line(bool value) = 0;
virtual uint16_t get_value_of_register(Register r) = 0;
virtual void set_value_of_register(Register r, uint16_t value) = 0;
virtual uint16_t value_of(Register r) = 0;
virtual void set_value_of(Register r, uint16_t value) = 0;

4
Processors/6502/Implementation/6502Implementation.hpp
View File

@ -704,7 +704,7 @@ bool ProcessorBase::is_jammed() const {
return is_jammed_;
}
uint16_t ProcessorBase::get_value_of_register(Register r) const {
uint16_t ProcessorBase::value_of(Register r) const {
switch (r) {
case Register::ProgramCounter: return pc_.full;
case Register::LastOperationAddress: return last_operation_pc_.full;
@ -717,7 +717,7 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const {
}
}
void ProcessorBase::set_value_of_register(Register r, uint16_t value) {
void ProcessorBase::set_value_of(Register r, uint16_t value) {
switch (r) {
case Register::ProgramCounter: pc_.full = value; break;
case Register::StackPointer: s_ = uint8_t(value); break;

4
Processors/6502Esque/6502Esque.hpp
View File

@ -24,7 +24,7 @@
namespace CPU::MOS6502Esque {
/*
The list of registers that can be accessed via @c set_value_of_register and @c set_value_of_register.
The list of registers that can be accessed via @c value_of(Register) and @c set_value_of(Register, value).
*/
enum Register {
LastOperationAddress,
@ -43,7 +43,7 @@ enum Register {
};
/*
Flags as defined on the 6502; can be used to decode the result of @c get_value_of_register(Flags) or to form a value for
Flags as defined on the 6502; can be used to decode the result of @c value_of(Flags) or to form a value for
the corresponding set.
*/
enum Flag: uint8_t {

4
Processors/65816/65816.hpp
View File

@ -60,8 +60,8 @@ class ProcessorBase: protected ProcessorStorage {
*/
inline void restart_operation_fetch();
void set_value_of_register(Register r, uint16_t value);
uint16_t get_value_of_register(Register r) const;
void set_value_of(Register r, uint16_t value);
uint16_t value_of(Register r) const;
};
template <typename BusHandler, bool uses_ready_line> class Processor: public ProcessorBase {

4
Processors/65816/Implementation/65816Base.cpp
View File

@ -10,7 +10,7 @@
using namespace CPU::WDC65816;
uint16_t ProcessorBase::get_value_of_register(Register r) const {
uint16_t ProcessorBase::value_of(Register r) const {
switch (r) {
case Register::ProgramCounter: return registers_.pc;
case Register::LastOperationAddress: return last_operation_pc_;
@ -30,7 +30,7 @@ uint16_t ProcessorBase::get_value_of_register(Register r) const {
}
}
void ProcessorBase::set_value_of_register(Register r, uint16_t value) {
void ProcessorBase::set_value_of(Register r, uint16_t value) {
switch (r) {
case Register::ProgramCounter: registers_.pc = value; break;
case Register::StackPointer: registers_.s.full = value; break;

2
Processors/Z80/Z80.hpp
View File

@ -20,7 +20,7 @@
namespace CPU::Z80 {
/*
The list of registers that can be accessed via @c set_value_of_register and @c set_value_of_register.
The list of registers that can be accessed via @c value_of(Register) and @c set_value_of(Register).
*/
enum class Register {
ProgramCounter,