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mirror of https://github.com/TomHarte/CLK.git synced 2026-01-23 16:16:16 +00:00
Commit Graph

12 Commits

Author SHA1 Message Date
Thomas Harte
105272630e Definitively eliminate per-logger state. 2025-09-11 23:29:47 -04:00
Thomas Harte
a9f9be330d Allow SegmentedMemory to take different LinearMemorys. 2025-07-26 08:18:16 -04:00
Thomas Harte
b5aab442f8 Template immediate-read Segments; continue fixing 8088Tests. 2025-07-24 22:24:53 -04:00
Thomas Harte
1bf898405f Generalise 'Registers'. 2025-07-21 21:17:54 -04:00
Thomas Harte
b3000f6350 Made mode knowable; factor out main part of far jump. 2025-05-17 23:08:07 -04:00
Thomas Harte
d5997a30b2 Reset output on latch write in applicable modes. 2025-04-04 12:30:08 -04:00
Thomas Harte
88ed49a833 Enable A20 at reset; fully propagate return to real mode. 2025-04-03 16:14:49 -04:00
Thomas Harte
d5c53ca624 Set A20 line properly. 2025-03-26 21:51:43 -04:00
Thomas Harte
fd31d07f41 Begin division of memory into linear and segmented mappings. 2025-03-24 22:58:19 -04:00
Thomas Harte
fac15f5539 Introduce a linear-memory holder. 2025-03-24 21:23:08 -04:00
Thomas Harte
4f35d5dabd Log A20 line. 2025-03-09 23:09:58 -04:00
Thomas Harte
98f20c57c1 Attempt to support reset-by-8042, resulting in boot loop. 2025-03-08 00:47:56 -05:00