250 Commits

Author	SHA1	Message	Date
Thomas Harte	c9c1bde6e2	Switch to spinning on SID thread synchronisation.	2025-11-13 17:59:24 -05:00
Thomas Harte	c5dc65fc61	Resolve various whitespace errors.	2025-10-29 11:50:56 -04:00
Thomas Harte	9261939f62	Switch to working PC for testing.	2025-09-22 13:24:35 -04:00
Thomas Harte	0d1fe03369	Further prefer static constexpr.	2025-09-12 21:40:08 -04:00
Thomas Harte	105272630e	Definitively eliminate per-logger state.	2025-09-11 23:29:47 -04:00
Thomas Harte	ef09b971fa	Watch software interrupt flags. ... Now tracking: issue seems to be reaching TEST4.ASM:D11 with an interrupt that it believes to be software-originating.	2025-09-10 15:47:19 -04:00
Thomas Harte	995444b11b	Add TODO on what seems to be the current issue.	2025-09-10 11:33:38 -04:00
Thomas Harte	4765a39759	New guess: writing to the keyboard implicitly enables communications.	2025-09-09 23:38:21 -04:00
Thomas Harte	45c4ca6bec	Attempt further to elide storage.	2025-09-09 13:58:37 -04:00
Thomas Harte	4e822347a5	Finally crack case of controller failure.	2025-09-04 15:16:48 -04:00
Thomas Harte	d3c77523c3	Report normal terminations, usually.	2025-09-04 11:41:29 -04:00
Thomas Harte	787a5ce568	Reduce speed multiplier.	2025-09-03 22:22:12 -04:00
Thomas Harte	7042e457ab	Fix OUT sizes.	2025-09-02 12:32:27 -04:00
Thomas Harte	faeec1701f	Add logging, reduce template specialisation.	2025-09-02 12:31:16 -04:00
Thomas Harte	8c65dccc53	Support 16-bit IO access.	2025-09-01 23:31:31 -04:00
Thomas Harte	de7c3ba92f	Mostly kick IDE accesses down the road.	2025-09-01 00:02:16 -04:00
Thomas Harte	8b4a4369c1	Add a target for IDE activity.	2025-08-26 23:47:39 -04:00
Thomas Harte	5018d7d577	Be more rigorous about static constexpr.	2025-08-26 22:54:39 -04:00
Thomas Harte	1ca279d99d	Add keyboard command lookaside; dummy IDE read.	2025-08-25 22:49:32 -04:00
Thomas Harte	076334bc4e	Take first stab at separating keyboard & controller.	2025-08-25 22:14:51 -04:00
Thomas Harte	fd670d5175	Reduce AT to 640kb RAM. ... This substantially speeds up the boot process, clearing the way for other experimentation.	2025-08-23 21:51:48 -04:00
Thomas Harte	6487086354	Increase floppy logging, adjust sense interrupt.	2025-08-23 21:21:16 -04:00
Thomas Harte	e68a356fd0	Adjust AT switches input.	2025-08-18 23:26:58 -04:00
Thomas Harte	0a65248bf7	Add MDA status register, various notes.	2025-08-14 22:28:22 -04:00
Thomas Harte	9cff26b163	Install BASIC ROM.	2025-08-13 23:36:07 -04:00
Thomas Harte	2f7a6bb242	Establish a specialised validate_call.	2025-08-11 17:10:58 -04:00
Thomas Harte	76284eb462	Fix 8088 assumption about unused flags; 80286 PUSHF now passes amongst others. ... 51,091 failures still to fix though.	2025-08-06 15:31:03 -04:00
Thomas Harte	01fbe2d3de	Support 808286 STOS oddities.	2025-08-06 13:37:34 -04:00
Thomas Harte	9a25d601f1	Fully transfer faulting logic.	2025-08-02 18:37:56 -04:00
Thomas Harte	846f745e2c	Attempt to transfer ownership of fault.	2025-08-02 18:26:00 -04:00
Thomas Harte	a9f9be330d	Allow SegmentedMemory to take different LinearMemorys.	2025-07-26 08:18:16 -04:00
Thomas Harte	b5aab442f8	Template immediate-read Segments; continue fixing 8088Tests.	2025-07-24 22:24:53 -04:00
Thomas Harte	1bf898405f	Generalise 'Registers'.	2025-07-21 21:17:54 -04:00
Thomas Harte	df621a8205	Add real and protected callbacks.	2025-05-18 23:35:49 -04:00
Thomas Harte	8041b87317	Introduce segment preauthorisation.	2025-05-18 22:11:23 -04:00
Thomas Harte	61469f8e09	Reindent to avoid many false warnings.	2025-05-12 21:36:49 -04:00
Thomas Harte	2572da872a	Improve consts, use concepts, reduce indentation.	2025-05-12 09:13:27 -04:00
Thomas Harte	8c9df5556d	Generalise support for multiple speeds.	2025-05-05 22:55:23 -04:00
Thomas Harte	4cc21a2c20	Include descriptor table and MSW requirements.	2025-05-03 23:01:31 -04:00
Thomas Harte	0a60e38d82	Abandon Interrupt naming.	2025-05-02 10:23:20 -04:00
Thomas Harte	f53b40e127	Focus on an Exception as the interrupt token.	2025-05-01 22:36:58 -04:00
Thomas Harte	4cd57856ce	Take ownership of 32-bit assumption.	2025-04-22 21:10:20 -04:00
Thomas Harte	7de23ec2aa	Be specific about types.	2025-04-21 23:03:57 -04:00
Thomas Harte	ad6ad144a5	Don't regress PC for external interrupts.	2025-04-05 21:39:37 -04:00
Thomas Harte	ecc7501377	Avoid explicit instantiation, precedence error.	2025-04-03 22:09:49 -04:00
Thomas Harte	3c04e08df2	Ensure 16-bit ins and outs always occur as two 8-bit operations. ... Advances the AT to system error 108, something about timer 2.	2025-04-03 19:52:40 -04:00
Thomas Harte	88ed49a833	Enable A20 at reset; fully propagate return to real mode.	2025-04-03 16:14:49 -04:00
Thomas Harte	88d34012c4	Continue trying to flesh out exceptions.	2025-04-02 23:27:43 -04:00
Thomas Harte	a9a72a767d	Improve fault pathways.	2025-04-01 09:13:41 -04:00
Thomas Harte	ec7e343673	Start to establish throw/catch of 80286 exceptions.	2025-03-30 13:23:36 -04:00