Commit Graph
466 Commits
Author SHA1 Message Date
Thomas Harte 3abf83e8b1 Rename 'Plus 3' as per its generality. 2026-06-03 09:54:47 -04:00
Thomas Harte 25b433b6bc Remove spaces. 2026-05-14 20:47:43 -04:00
Thomas Harte 6fef00447d Formalise empty-string semantics. 2026-05-09 23:20:26 -04:00
Thomas Harte 709a31a362 Push forward to a non-responsive machine. 2026-05-02 12:06:49 -04:00
Thomas Harte 5eb2cf108e Prefer reference: this shouldn't be nullable. 2026-05-02 10:59:31 -04:00
Thomas Harte 85ddc42f9c Regularise factory method name. 2026-05-01 22:41:25 -04:00
Thomas Harte c9edb93bdd Eliminate ATOMIC_FLAG_INITs; unnecessary since C++20. 2026-04-22 21:20:38 -04:00
Thomas Harte 456cd63240 Avoid std::vector reliance. 2026-04-14 22:37:49 -04:00
Thomas Harte f7cf9273af Dash back to a functioning build. 2026-04-14 21:36:37 -04:00
Thomas Harte 4ec043a4c7 Wire though unicode character lookup. 2026-04-14 18:17:29 -04:00
Thomas Harte bf7e9f42ac Add support for M5 cartridge images. 2026-04-06 22:10:47 -04:00
Thomas Harte 646d638cd4 Add consts. 2026-04-04 09:08:06 -04:00
Thomas Harte 05a85b6ba9 Resolve various compiler warnings: primarily ~'s promotion to int. 2026-03-25 13:57:32 -04:00
Thomas Harte 4ee674287e Neaten. 2026-03-09 12:30:53 -04:00
Thomas Harte 892f16be7b Tilt back towards fused divide-and-convert. 2026-03-09 11:52:51 -04:00
Thomas Harte 186b911e8e Switch to get/as. 2026-03-06 15:44:22 -05:00
Thomas Harte 13a55ea947 Add const. 2025-12-21 22:46:42 -05:00
Thomas Harte 67171f348a Use std::copy_n where it more directly matches intent. 2025-12-10 22:23:42 -05:00
Thomas Harte 6fb13a4903 Use std::fill_n where it's more natural. 2025-12-07 09:33:27 -05:00
Thomas Harte 461239e2e9 Further reduce memcpy reliance. 2025-12-06 14:03:00 -06:00
Thomas Harte 574de95403 Reduce usage of memcpy. 2025-12-06 11:12:25 -06:00
Thomas Harte 6ac6157d06 Eliminate memset from C++ files. 2025-12-06 10:55:32 -06:00
Thomas Harte 52494e916a Ensure I'm using <optional> everywhere I should. 2025-12-04 13:20:51 -05:00
Thomas Harte c9c1bde6e2 Switch to spinning on SID thread synchronisation. 2025-11-13 17:59:24 -05:00
Thomas Harte 989fb32fba Fix clocking, do a linear attack phase. 2025-11-11 20:53:54 -05:00
Thomas Harte 4e86184955 Add local hack to ensure good flushing. 2025-11-11 14:40:13 -05:00
Thomas Harte 29235f1276 Adjust noise clocking, make it reactive to the test bit. 2025-11-11 09:16:43 -05:00
Thomas Harte ae2936b9c3 Correct clock rate, triangle wave. 2025-11-10 22:35:13 -05:00
Thomas Harte 5e98e6502d Attempt some basic voice details. 2025-11-08 21:54:41 -05:00
Thomas Harte fe7a206fc5 Add an empty vessel of a SID. 2025-11-07 22:51:28 -05:00
Thomas Harte 32cd142629 Move point of templature to tube processors. 2025-11-07 17:27:52 -05:00
Thomas Harte 34992126a8 Allow installation of smaller ROMs. 2025-11-07 09:12:47 -05:00
Thomas Harte d30d4e8f89 Add DFS 0.9 to the ROM catalogue. 2025-11-07 09:08:16 -05:00
Thomas Harte 2fe6e9c7fc Reformulate to give ULA full IRQ/NMI/reset signalling duties. 2025-11-05 15:27:11 -05:00
Thomas Harte 62919e77d4 Reset at end. 2025-11-05 15:11:49 -05:00
Thomas Harte ca23c04ba1 Propagate system reset to the tube. 2025-11-04 23:18:18 -05:00
Thomas Harte 25dcbf918d Ensure Z80 interrupts end. 2025-11-04 22:04:41 -05:00
Thomas Harte 6c72c1842b Change interrupt vector. 2025-11-04 21:57:20 -05:00
Thomas Harte 4e4388dc35 Adjust reset logic, 6502 tube paging. 2025-11-04 21:34:45 -05:00
Thomas Harte 54bff80ecc Fix: it's the PC going above 0x8000 that ends ROM visibility. 2025-11-04 18:21:00 -05:00
Thomas Harte 78073aaa11 Add Z80 tube ROM. 2025-11-04 17:45:27 -05:00
Thomas Harte 4df01a7e0d Ensure Z80 processes. 2025-11-04 17:38:46 -05:00
Thomas Harte f4d15d0640 Mostly wire in a Z80 second processor. 2025-11-04 17:36:30 -05:00
Thomas Harte f52315ac92 Further annotate. 2025-11-04 12:48:49 -05:00
Thomas Harte cc88877109 Move tube holder out of line. 2025-11-04 12:46:15 -05:00
Thomas Harte d7568e57c3 Make other layout edits. 2025-11-04 09:27:04 -05:00
Thomas Harte d49b301fca Improve commentary. 2025-11-04 09:22:17 -05:00
Thomas Harte 0113bcbea7 Include tube storage only when needed. 2025-11-04 09:20:28 -05:00
Thomas Harte 82a5d5116a Expose processor option to macOS users, too. 2025-11-03 21:31:44 -05:00
Thomas Harte 62a6797ef3 The second processor appears to be a 65c02. 2025-11-03 21:06:34 -05:00