214 Commits

Author	SHA1	Message	Date
Thomas Harte	12f7e1b804	Enshrined a default colour burst amplitude. Which now everybody relies on. The 102 figure is derived from the burst apparently being 40 IRE.	2017-07-07 23:35:14 -04:00
Thomas Harte	eb8a2de5d6	Settled definitively on flush as more communicative than synchronise (and slightly more locale neutral); culled some more duplication from the Z80.	2017-05-15 07:38:59 -04:00
Thomas Harte	e270b726b3	Tweaked blue, increased saturation.	2017-05-13 22:01:02 -04:00
Thomas Harte	44ce7fa54c	Corrected luminances across the board, and PAL colours.	2017-05-13 21:50:09 -04:00
Thomas Harte	b0142cf050	Made an updated stab at NTSC colours.	2017-05-13 14:29:36 -04:00
Thomas Harte	a340331229	Introduced 1-bit of saturation, returning black and white as black and white.	2017-05-11 21:31:58 -04:00
Thomas Harte	15d17c12d5	Switched the 6560 to two bytes per pixel, since one isn't sufficient for precision and because mixing up the implementation might help me to figure out what's amiss.	2017-05-09 21:22:01 -04:00
Thomas Harte	5998123868	Added some consts, for a minor safety improvement.	2017-05-06 19:53:24 -04:00
Thomas Harte	e01f3f06c8	Completed curly bracket movement.	2017-03-26 14:34:47 -04:00
Thomas Harte	a4c5eebd1e	The latest Atari Age-discovered numbers suggest this starts up in 1024T mode.	2017-03-21 18:22:50 -04:00
Thomas Harte	c445eaec3e	Switched startup values, following a comment on AtariAge. May or may not be correct, the thread was speculative.	2017-03-19 17:38:26 -04:00
Thomas Harte	e0bca1e37b	Reinstated the 16 and 32 kb Atari pagers, and ensured the 6532 always starts in a valid state.	2017-03-18 17:34:34 -04:00
Thomas Harte	d3257c345a	Tested against public ROMs and corrected. Also moved the deferred adjustment into a more canonical place.	2017-03-04 17:00:28 -05:00
Thomas Harte	e09b76bf32	Fixed 'same value, then immediate increment, then proper counting increments' behaviour and ensured it takes one cycle to commit a value. Adjusted tests to match.	2017-03-04 15:57:54 -05:00
Thomas Harte	ced644b103	It seems likely that an AY divides its clock by 8, not 16. I had conflated wave frequency and counter clock.	2017-01-11 22:03:01 -05:00
Thomas Harte	eca3995481	Added a CRC check for read address, ensured CRC, lost data and record not found are initially reset.	2017-01-01 21:00:25 -05:00
Thomas Harte	044c920a5b	Made it more explicit that there are no unhandled cases.	2017-01-01 20:56:52 -05:00
Thomas Harte	0df9ce5a76	Made an attempt at read address. So superficially that leaves only the force interrupts.	2017-01-01 20:55:09 -05:00
Thomas Harte	f94f34f053	Made an attempt at read track. Which means process_input_bit can't just swallow syncs any more; it now reports them as tokens of type ::Sync.	2017-01-01 20:39:19 -05:00
Thomas Harte	c994fa39f6	Ensured spin-up doesn't occur if there's no motor line.	2016-12-31 16:18:30 -05:00
Thomas Harte	1ea4f0d79d	Made an attempt to implement 'write track' and ensure that 'write sector' can't end without announcing that it has ended writing.	2016-12-31 16:01:44 -05:00
Thomas Harte	8eb21c6702	The "MFM...Byte"s aren't MFM-specific, they're relevant to both FM and MFM encoding. So renamed them. Also slimmed syntax within MFM.cpp mostly where emigration from the Acorn disk analyser had left a residue of lengthy namespace specification.	2016-12-31 15:25:11 -05:00
Thomas Harte	a8bc9d830e	Removed leftover very temporary debugging aid.	2016-12-28 23:03:05 -05:00
Thomas Harte	e4000bd060	Added some even more verbose logging; slightly simplified write loop logic, and decided it's definitely write_byte that's responsible for CRC generator feeding.	2016-12-28 21:24:19 -05:00
Thomas Harte	4adcb46665	Fixed FM-mode CRC generation.	2016-12-28 19:51:27 -05:00
Thomas Harte	1277a67f9a	Introduced data_mode_ to replace is_reading_data_, representing that there are now three possible modes. When writing, any input from the read head won't affect the CRC generator.	2016-12-28 19:26:21 -05:00
Thomas Harte	7a627b782d	Reintroduced writing of MFM sync marks when writing a sector.	2016-12-28 18:48:50 -05:00
Thomas Harte	a568172758	Made steps towards proper CRC generation. Am currently comparing against Oric disk images, as — amongst other things — they include precomputed CRCs.	2016-12-28 18:29:37 -05:00
Thomas Harte	9c0f622a2e	Started working CRC checking into the 1770. Discovered immediately that my generated CRC does not match that built into the Oric disk images. So mine is pretty-much certainly wrong. An opportunity for learning!	2016-12-26 16:46:26 -05:00
Thomas Harte	0490a47058	Worked on the all-around framework for decoding sectors back from tracks when closing down a file. Hit the wall that the parser is more observant of CRCs than the WD. No, really. So I guess I have to stop avoiding that whole issue.	2016-12-26 14:24:33 -05:00
Thomas Harte	83c433c142	Deviated from the data sheet, which seems likely to be correct. Hence removed a whole load of the temporary logging.	2016-12-26 12:48:49 -05:00
Thomas Harte	742c5df367	With lots of logging arising temporarily, fixed bug whereby conversion to a patched track would lead to holding a track with a distinct measure of time, leading to improperly-placed patches.	2016-12-25 22:00:39 -05:00
Thomas Harte	acc35885cd	Attempted to reduce track invalidations.	2016-12-25 20:38:25 -05:00
Thomas Harte	c0a1264ab0	Slightly improved legibility.	2016-12-25 20:19:47 -05:00
Thomas Harte	e2b829f68e	Made an attempt to write the proper address mark.	2016-12-25 20:15:07 -05:00
Thomas Harte	beaa868079	Factored the MFM parser out into encodings.	2016-12-25 20:00:57 -05:00
Thomas Harte	74e98fd097	Made an attempt to write actual data (albeit that CRC calculation is still missing).	2016-12-25 19:18:45 -05:00
Thomas Harte	98be6ede45	Shuffled a little to reduce risk of overflow, ensured writing is a loop, still seem to be writing too quickly for some reason.	2016-12-25 16:13:05 -05:00
Thomas Harte	d2ad2c756e	Added enough shovelling to write rubbish for an entire sector.	2016-12-25 15:46:49 -05:00
Thomas Harte	aceb7e3b6b	Started implementing write sector on the 1770, immediately deciding it would be useful to have a callback for end-of-queued-data-written from disk controller. So had a go at implementing that, naively. More investigation required.	2016-12-25 12:31:38 -05:00
Thomas Harte	901f19f89c	Added enough stuff that SSDs attached to a 1770 will now reach the entry point for writing.	2016-12-25 09:46:12 -05:00
Thomas Harte	c304db0f5a	Deintegrated the busy flag and the interrupt request line, as the latter is reset by status reads. Which also means I can start reporting the WD INTRQ line status directly from the Microdisc. That appears to be correct, rather than honouring the Microdisc IRQ select there.	2016-12-06 21:16:29 -05:00
Thomas Harte	ca50606e1d	Restored Vic audio.	2016-12-03 17:10:47 -05:00
Thomas Harte	36bc558798	Converted all 'Components' to postfix underscores.	2016-12-03 10:51:09 -05:00
Thomas Harte	81ee834530	As well as a bunch of logging, reinstated rotation position preservation across tracks.	2016-12-02 18:36:47 -05:00
Thomas Harte	93c573bfa9	Implemented missing status bits (other than the index hole), and a head loading delay for the Microdisc.	2016-12-01 21:13:16 -05:00
Thomas Harte	0a0775c3bd	Removed earlier hacky solution.	2016-12-01 20:16:11 -05:00
Thomas Harte	442986ee2c	Introduced a head loading path for 1793 machines.	2016-12-01 20:12:22 -05:00
Thomas Harte	82899f2f47	Ensured flag setting is atomic, removed duplication of interrupt request versus busy, found better names for the personality testers, unified delegate protocol.	2016-12-01 07:41:52 -05:00
Thomas Harte	b31fd11470	Fixed reporting of data request line, initial status values.	2016-11-30 22:39:55 -05:00