Thomas Harte
25996ce180
Further doubles down on construction syntax for type conversions.
2020-05-09 23:00:39 -04:00
Thomas Harte
03d23aad41
Corrects reported ZX80/81 scan status.
2020-01-25 23:27:09 -05:00
Thomas Harte
a71c5946f0
Ensures proper manipulation of scan_statuses, leading to the correct result out of a CRTMachine.
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Possibly with the exception of the TMS, as I appear to have uncovered an unrelated issue there.
2020-01-21 22:28:25 -05:00
Thomas Harte
d97a073d1b
Adds the necessary routine for all machines to be able to respond to get_scan_status.
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They all just as the CRT, as all are currently based on the CRT. Which doesn't currently know the total clock rate it would need to in order properly to scale the answer to the question. Further thought coming.
2020-01-20 21:45:10 -05:00
Thomas Harte
1c154131f9
Expands size of storage in Cycles/HalfCycles; adjusts widely to compensate.
2019-10-29 22:36:29 -04:00
Thomas Harte
64465f97b6
Starts towards reintroducing the proper mechanisms for selecting a display type at runtime.
2018-11-28 17:53:33 -08:00
Thomas Harte
770d7e90e9
Removes stale sampling functions.
2018-11-22 22:47:29 -05:00
Thomas Harte
8a699b6072
Kills setup_output definitively, saving some indirection. set_scan_target takes its place.
2018-11-14 21:52:57 -05:00
Thomas Harte
6d277fecd5
Makes ScanTarget a little more communicative and orthogonal.
2018-11-10 19:52:57 -05:00
Thomas Harte
55da1e9c0f
Simplifies semantics a little and starts accepting a single buffer of pixel data.
2018-11-06 22:23:38 -05:00
Thomas Harte
014da41471
Ensures scan positions are communicated with a specified range, and switches manner of pixel clock communication.
2018-11-04 21:06:25 -05:00
Thomas Harte
f6562de325
Possibly adds enough for the Electron and ZX80 to start outputting dummy lines.
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Let's see!
2018-11-03 23:40:39 -04:00
Thomas Harte
b40211d2c0
Starts to bend 'CRTMachine' to a world farther from owning the GPU relationship.
2018-11-03 21:54:25 -04:00
Thomas Harte
da4d883321
Adds first, incomplete attempts to talk to a ScanTarget from the CRT.
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Does away with the hassle of `unsigned` while I'm here; that was a schoolboy error.
2018-11-03 19:58:44 -04:00
Thomas Harte
a38639d099
Eliminates the concept of an iCoordinate.
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Real-life precision appears not to support the idea of sub-sample pixel storage.
2018-09-12 20:05:39 -04:00
Thomas Harte
80b281d9f1
Switches back to whole bytes per pixel, owing to persistent precision problems at 1bpp.
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Also fixes the inaccurately-named `cycles_since_update_`.
2018-06-02 18:25:00 -04:00
Thomas Harte
0b771ce61a
Removes all instances of the copyright symbol.
2018-05-13 15:19:52 -04:00
Thomas Harte
6547560e52
Gives the CRT the ability to move iCoordinate multiplication outside of the fragment loop.
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That resolves precision issues, as were plaguing the Apple II.
2018-04-18 19:29:03 -04:00
Thomas Harte
1c605d58e3
Removes the CRT requirement for an integral relationship between cycles and samples.
2018-04-16 20:00:56 -04:00
Thomas Harte
865c47a1ac
Names the magic constants.
2018-04-08 10:35:07 -04:00
Thomas Harte
3821679efd
Switches to bit unpacking on the GPU.
2018-04-07 22:17:47 -04:00
Thomas Harte
c0b4dd65da
Mades the expected video signal usage explicit.
2018-04-04 19:01:18 -04:00
Thomas Harte
ac80d10cd8
Separates the component parts of running an audio stream: task deferral, filtering and generation.
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Walking towards improving opportunities for composition.
2017-12-17 21:26:06 -05:00
Thomas Harte
2203499215
Enables -Wreorder and corrects a few of the more trivial fixes thereby suggested.
2017-11-09 22:14:22 -05:00
Thomas Harte
ad9df4bb90
Commutes uint8_t *, uint16_t *, uint32_t *, size_t, off_t and long to functional-style casts.
2017-10-21 22:30:15 -04:00
Thomas Harte
5e3e91373a
Switches all unsigned int and double casts to functional style.
2017-10-21 19:49:04 -04:00
Thomas Harte
4abd62e62b
Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty.
2017-07-27 22:05:29 -04:00
Thomas Harte
b82bef95f3
Decided to follow through on Cycles and HalfCycles as complete integer-alikes. Which means giving them the interesting range of operators. Also killed the implicit conversion to int as likely to lead to type confusion.
2017-07-24 20:10:05 -04:00
Thomas Harte
c2a7dffa7d
Converted the ZX80/81 video component into a ClockReceiver. As it happens, it's most convenient to take the half-cycle bus here.
2017-07-22 23:02:28 -04:00
Thomas Harte
ed28260aaf
Hardens the ZX80/81 video routines to ensure they never try to push data into the future and don't double-count time when pixels would ostensibly run into sync. You could previously see the CRT being handed negative run lengths if sync interrupted pixels or if a run of more than 320 pixels (my arbitrary buffer size) occurred, with corresponding poor behaviour given my use of unsigned numbers.
2017-07-09 19:33:05 -04:00
Thomas Harte
30e93979d2
Removed data work if sync is enabled; in that case no data is output.
2017-07-08 21:01:07 -04:00
Thomas Harte
b9dbb6bcf8
Discovered my timing error: the I/R <-> A loads should take an extra cycle. This means the ZX80 now finally takes the correct 207 cycles per line. Fixed the video output wave to be clocked at the appropriate rate.
2017-06-12 18:55:04 -04:00
Thomas Harte
ba5f34f827
Narrowed view to the centre 80% of a frame.
2017-06-11 17:24:32 -04:00
Thomas Harte
d910a4fd38
Adjusted to signal an interrupt during the refresh cycle rather than weirdly just afterwards. Which cuts video timing down by 4 cycles a line. There still might be a problem here somewhere though, as I'm getting 206 cycles/line and the internet states it should be 207.
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Also: lots of printfs have grown temporarily as I try to figure out what I'm doing so wrong as to break loading.
2017-06-11 13:32:20 -04:00
Thomas Harte
e3ee9604a5
Added comments.
2017-06-06 18:01:33 -04:00
Thomas Harte
8c66e1d99d
Factored out ZX80/81 video and rejigged to ensure it will keep ticking over irrespective of whether the machine is supplying data.
2017-06-06 17:53:23 -04:00
