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3,985 Commits 8 Branches 121 Tags 496 MiB
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643 Commits

Author SHA1 Message Date
Thomas Harte
3f6944de54 Corrects custom info block parsing. 2018-07-11 22:21:35 -04:00
Thomas Harte
e8f847d288 Fixes CRC generator used to verify Acorn programs. 2018-07-10 20:01:31 -04:00
Thomas Harte
a0f817108e Minor style fix. 2018-07-10 20:01:11 -04:00
Thomas Harte
bfccadd356 Corrects comment typo. 2018-07-03 21:38:04 -04:00
Thomas Harte
5b3512f1df Attempts to pick an intelligent place to pad out tracks. 2018-07-03 20:10:22 -04:00
Thomas Harte
6e34e60f8a Ensures no data is dropped in transcribing a NIB to real track data. 2018-07-03 20:01:07 -04:00
Thomas Harte
abc5c50b2e Added some additional exposition. 2018-07-02 21:51:53 -04:00
Thomas Harte
1fcb461c42 Ensures that segments are written in a properly-circular fashion. 2018-07-02 19:35:49 -04:00
Thomas Harte
abca38a548 Makes an initial removal of PCMPatchedTrack. Farewell, old friend. 2018-07-01 22:49:57 -04:00
Thomas Harte
b4be2cd063 Implements PCMTrack::add_segment. Thereby completes PCMTrack::resampled_clone. 2018-07-01 18:28:25 -04:00
Thomas Harte
2d83eeb9c4 Further minor style improvements. 2018-07-01 17:59:43 -04:00
Thomas Harte
4d9e897cc3 Corrects addressing for deserialisation of bytes. 2018-07-01 15:58:56 -04:00
Thomas Harte
be664b5695 Ensures that start positions are properly related to sectors. 2018-07-01 15:53:48 -04:00
Thomas Harte
c3751066b7 Ensures segments are properly sized. 2018-07-01 15:43:31 -04:00
Thomas Harte
77feee8197 Applies minor style improvements. 2018-07-01 15:38:42 -04:00
Thomas Harte
f75af3b45e Adds some extra exposition. 2018-07-01 14:41:17 -04:00
Thomas Harte
1471a35bb8 Reserves a more appropriate amount of data. 2018-07-01 14:40:48 -04:00
Thomas Harte
555c2a4377 Makes a first sweep at converting the storage underlying PCMSegment to vector<bool>. 
This is to remove another pain point, in preparation for the work immediately forthcoming but also work as-yet unknown.
 2018-07-01 12:05:41 -04:00
Thomas Harte
16bef0dcd5 Starts the movement towards a world without PCMPatchedTrack. 2018-06-30 20:03:18 -04:00
Thomas Harte
62eef8cb40 Reinstates proper ready behaviour. 2018-06-18 21:35:39 -04:00
Thomas Harte
27657fcde0 Adds necessary header for assert. 2018-06-10 21:02:19 -04:00
Thomas Harte
e0b75b6e3d Corrects logic for avoiding overwrite. 2018-06-09 21:47:51 -04:00
Thomas Harte
a694844190 Moves gap 1 into proper ownership. 2018-06-09 17:28:08 -04:00
Thomas Harte
28f2d331a8 Switches to more realistic gaps. 2018-06-09 13:06:45 -04:00
Thomas Harte
dde9b73a22 Creates the through-path that will be necessary for RWTS acceleration. 2018-06-09 12:51:53 -04:00
Thomas Harte
744c35b617 Caps the number of sync bytes inserted at five. 2018-06-06 21:52:26 -04:00
Thomas Harte
9ac21a4e71 Switches to ignoring the byte count, trusting the bit count entirely. 2018-06-06 21:51:55 -04:00
Thomas Harte
db8d8d8404 Commutes Sleeper to ClockingHint::Source, making state more granular. 2018-05-27 23:17:06 -04:00
Thomas Harte
20843305dd Removes unused calculation of vars. 2018-05-27 13:31:30 -04:00
Thomas Harte
8f6c0f6a8d Eliminates vars test. 
At least Humpty Dumpty is a working .p that doesn't satisfy the test.
 2018-05-26 19:05:35 -04:00
Thomas Harte
d45231c1a8 Introduces an additional validation test. 
Thereby satisfying the TODO.
 2018-05-25 18:40:15 -04:00
Thomas Harte
772812b35f Corrects improper textual reference to interface names. 2018-05-25 18:31:20 -04:00
Thomas Harte
f443fd44b5 Introduces support for writing NIBs. 2018-05-25 18:30:55 -04:00
Thomas Harte
79c60b8984 Adds necessary import for memcpy. 2018-05-24 21:58:50 -04:00
Thomas Harte
523ca3264b Implements write support for WOZ files. 2018-05-24 21:44:31 -04:00
Thomas Harte
8f78e5039e Factors out track seeking. 2018-05-24 18:45:00 -04:00
Thomas Harte
57ee6d4e41 Merge branch 'master' into WOZWriting 2018-05-23 22:32:30 -04:00
Thomas Harte
2868b1eca7 Adds missing import for memcpy. 2018-05-23 22:31:35 -04:00
Thomas Harte
ca4bc92c33 Adds WOZ CRC checking. 2018-05-23 22:22:17 -04:00
Thomas Harte
853261364e Generalised CRC generation and created specific subclasses for the CCITT CRC16 and CRC32. 2018-05-23 22:21:57 -04:00
Thomas Harte
4952657b31 Factors out physical to logical sector conversion. 2018-05-19 22:59:59 -04:00
Thomas Harte
46fae1a761 Corrected: now maps in the proper direction. 2018-05-19 22:50:33 -04:00
Thomas Harte
a09fb01d71 Makes an attempt at write support for Apple DSK files. 2018-05-19 22:30:52 -04:00
Thomas Harte
7cee3b7449 Resolves potential overflow / sign corruption. 2018-05-19 22:28:29 -04:00
Thomas Harte
8263c48a1d Added a guarantee that the TrackSerialiser won't modify tracks it receives. 2018-05-18 23:03:28 -04:00
Thomas Harte
ed06533e60 Implements write support out of the Disk II. 2018-05-18 22:07:58 -04:00
Thomas Harte
7b7beb13a3 Eliminates the fiction of setting and getting registers. 
The Disk II seems lower level than that; it will read the data bus whenever it likes, it is the programmer's responsibility to keep up with that. It also reserves the right not to load the bus regardless of whether it receives a read or write access.
 2018-05-17 21:39:11 -04:00
Thomas Harte
85c4e009f3 Undoes reformatting error. 2018-05-14 20:03:32 -04:00
Thomas Harte
76802b5e38 Eliminates arc4random. 
It seems not to be as portable as I'd hoped.
 2018-05-14 20:01:20 -04:00
Thomas Harte
9f2f388e5a Ensures generation of random noise if too many zeroes exist on a disk surface. 2018-05-14 19:17:34 -04:00