Thomas Harte
cf6fa98433
Corrects detection of terminal micro-ops.
2019-03-16 22:50:44 -04:00
Thomas Harte
937b3ca81d
Attempts properly to honour the bus-op and microcycle contract.
2019-03-16 22:36:09 -04:00
Thomas Harte
d0c5cf0d2d
Starts attempting to kill the need to prepare all bus step sequences in advance.
2019-03-16 21:47:46 -04:00
Thomas Harte
4cbf2bef82
By way of a friend, clears a bunch of transient stuff out of 68000Storage.hpp.
...
As, even if not in the programmer's eye, this does affect recompilation times.
2019-03-16 19:41:07 -04:00
Thomas Harte
388d808536
Switches to providing UDS and LDS implicitly via address.
...
Also makes sure that the difference between a non-data cycle that starts without the address strobe active and one that starts with it active can be discerned.
2019-03-16 17:54:58 -04:00
Thomas Harte
720aba3f2d
Adds an implementation of SBCD and slightly neatens syntax for building programs.
2019-03-14 21:22:02 -04:00
Thomas Harte
f9101de956
This might very well be the 68000's first real gasp: performing an ABCD.
2019-03-14 19:32:15 -04:00
Thomas Harte
bb04981280
I'm still dithering on address management, but this seeks fully to implement ABCD and SUBD bus programs.
2019-03-13 21:08:13 -04:00
Thomas Harte
57898ed6dd
This is where my thinking now resides. Two levels of indirection, and consolidated collections.
2019-03-12 22:46:31 -04:00
Thomas Harte
33b53e7605
Settles upon disassembly as the route in, and begins work in that direction.
2019-03-11 22:47:58 -04:00
Thomas Harte
89c71f9119
Introduces EmuTOS, and starts constructing test cases around it.
2019-03-10 18:40:12 -04:00
Thomas Harte
98aa597510
A theoretical 68000 could now perform its /RESET. That's all though.
2019-03-10 17:42:13 -04:00
Thomas Harte
de56d48b2f
Embraces a more communicative 68000 bus.
2019-03-10 17:27:34 -04:00
Thomas Harte
b9b52b7c8b
Begins some very early sketching out of a 68000.
2019-03-09 00:00:23 -05:00
