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mirror of https://github.com/TomHarte/CLK.git synced 2026-01-26 06:16:22 +00:00
Commit Graph

4026 Commits

Author SHA1 Message Date
Thomas Harte
7bb4d052d1 Correct collation test, to ensure no accidental buffer mixing. 2025-10-03 17:29:45 -04:00
Thomas Harte
7a90662c06 Merge branch 'master' into CompoundingTyper 2025-10-03 16:06:47 -04:00
Thomas Harte
ebfb215246 Support CB2 output strobe as triggering lightpen capture. 2025-10-03 15:39:16 -04:00
Thomas Harte
eb97e4e518 Reserve entire FF page; simplify logic. 2025-10-03 13:10:45 -04:00
Thomas Harte
0ac5681d13 Confirmed: 'capslock' has yet to become a single word. 2025-10-03 11:37:39 -04:00
Thomas Harte
1e27c5759b Add missing const. 2025-10-03 09:26:53 -04:00
Thomas Harte
5e71aedc99 Support lowercase typing into the BBC. 2025-10-03 09:25:58 -04:00
Thomas Harte
fcf648bbb2 Flip axes, maximise range. 2025-10-02 17:43:33 -04:00
Thomas Harte
a8325b6bce Add BBC joysticks. 2025-10-02 17:10:27 -04:00
Thomas Harte
22554a9ba4 Incorporate a one-column delay into CPC output. 2025-10-02 15:22:01 -04:00
Thomas Harte
cbcc7c718e SAA: smooth output just in time. 2025-10-02 09:20:58 -04:00
Thomas Harte
e6fd54c14b Correct forward slash key. 2025-09-30 21:33:15 -04:00
Thomas Harte
ccb8e90110 Improve naming. 2025-09-30 21:27:34 -04:00
Thomas Harte
a4e66f291a Avoid ambiguity with new DelaySlot 'key'. 2025-09-30 21:23:30 -04:00
Thomas Harte
99da8c4424 Avoid assuming 0 is not a valid key. 2025-09-30 21:07:02 -04:00
Thomas Harte
9a1bf1cf74 Reduce delay. 2025-09-30 21:06:56 -04:00
Thomas Harte
2256e99157 Attempt to add a typer. 2025-09-30 20:57:28 -04:00
Thomas Harte
3a5f8b4987 Fill in rest of character mapper. 2025-09-29 23:02:51 -04:00
Thomas Harte
6de5fcc980 Simplify test. 2025-09-29 22:52:56 -04:00
Thomas Harte
a454d0d4b7 Begin work on character mapper. 2025-09-29 22:52:48 -04:00
Thomas Harte
67339754e3 Resolve potential crash at startup. 2025-09-29 16:13:56 -04:00
Thomas Harte
feb4a7021c Add enum of BBC key names. 2025-09-29 15:00:56 -04:00
Thomas Harte
247e92cfa2 Correct mapping of F5. 2025-09-27 22:27:57 -04:00
Thomas Harte
66f605de0f Add meta as a synonym of control, option as caps lock. 2025-09-27 22:03:27 -04:00
Thomas Harte
d71796c88a Support automatic disk starting. 2025-09-26 15:55:04 -04:00
Thomas Harte
32a5bf76cd Introduce a crop, centred on the pixel area. 2025-09-26 12:06:44 -04:00
Thomas Harte
f8c11bf217 Rejig to ensure SAA output ends. 2025-09-25 21:31:21 -04:00
Thomas Harte
0214a77cd7 Add TODO. 2025-09-25 13:10:52 -04:00
Thomas Harte
425ed658f1 Support colour control codes, clarify SAA5050 signalling. 2025-09-25 13:03:55 -04:00
Thomas Harte
a53adb561e Erase TODO, continue to update state without target. 2025-09-25 09:25:46 -04:00
Thomas Harte
ebc04c6520 Eliminate warning. 2025-09-24 22:58:50 -04:00
Thomas Harte
8b0e8f5b13 Move all work [near] definitively into the SAA5050. 2025-09-24 22:55:49 -04:00
Thomas Harte
16132a007e Remove silly call. 2025-09-24 22:26:37 -04:00
Thomas Harte
b6e41ceea7 Hack in low-resolution Mode 7. 2025-09-24 22:25:43 -04:00
Thomas Harte
2e49bc2044 Add teletext pixel route, albeit without proper selection. 2025-09-24 20:33:07 -04:00
Thomas Harte
174c8dafbf Resolve potential out-of-phase line counter. 2025-09-24 17:26:40 -04:00
Thomas Harte
90a96293de Implement interlace-dependent row addressing. 2025-09-24 17:20:04 -04:00
Thomas Harte
ca6359a597 Reintroduce pixels, proving myself to be off-by-one. 2025-09-24 14:29:25 -04:00
Thomas Harte
f34ec03ff0 Attempt to fix off-by-one; adopt fixed pixel pattern. 2025-09-24 13:42:17 -04:00
Thomas Harte
1363be59b7 Formalise field size. 2025-09-24 11:17:47 -04:00
Thomas Harte
539b0e49d4 Start in mode 7, reallow interlaced modes. 2025-09-23 14:45:32 -04:00
Thomas Harte
3f6b3a4fa0 Don't allow a state to be permanently accumulated. 2025-09-23 14:41:59 -04:00
Thomas Harte
a199b64aa0 Clarify naming, attempt better to conform to FPGA precedent. 2025-09-23 14:27:21 -04:00
Thomas Harte
ca226e4295 Merge branch 'master' into New6845 2025-09-22 13:28:33 -04:00
Thomas Harte
9261939f62 Switch to working PC for testing. 2025-09-22 13:24:35 -04:00
Thomas Harte
ed4f299d55 Start formalising types. 2025-09-22 13:09:30 -04:00
Thomas Harte
557631f6ba Support ADFS, sideways RAM. 2025-09-20 22:33:08 -04:00
Thomas Harte
fb5ef200fb Correct uPD7002 interrupt wiring. 2025-09-20 21:51:19 -04:00
Thomas Harte
5e78ac3af5 Adjust keyboard map slightly. 2025-09-20 21:35:01 -04:00
Thomas Harte
40747f51bd Disable ADC interrupt, experimentally. 2025-09-20 17:41:22 -04:00