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162 Commits

Author SHA1 Message Date
Thomas Harte dd5b4b484a Avoid double responsibility for state. 2023-01-07 14:34:33 -05:00
Thomas Harte 56831e02fc Expand fixed timing constants. 2023-01-07 13:10:51 -05:00
Thomas Harte 5d2d3944ef Make VRAM access delay a timing property. 2023-01-07 12:48:43 -05:00
Thomas Harte f9e21df701 Avoid further hard-coded 342s. 2023-01-07 09:13:34 -05:00
Thomas Harte bb436204f6 Merge branch 'VDPs' of github.com:TomHarte/CLK into VDPs 2023-01-07 09:10:50 -05:00
Thomas Harte de45536b5c Elucidate a magic constant, add an extra constexpr. 2023-01-07 09:10:41 -05:00
Thomas Harte ebc1264c2c Create a common home for timing information. 2023-01-06 22:39:46 -05:00
Thomas Harte 27d37f71ec Generalise and better factor bit reversal and TMS drawing. 2023-01-05 13:18:10 -05:00
Thomas Harte a9f97ac871 Fix nothing-to-do test. 2023-01-02 15:04:08 -05:00
Thomas Harte 475440dc70 Update ClockConverter for potential alternative clocks. 2023-01-02 14:59:36 -05:00
Thomas Harte 5729ece7bb Incompletely transitions towards more flexible clock ratios. 2023-01-01 14:20:45 -05:00
Thomas Harte 151f60958e Relocate the 9918 implementation file. 2023-01-01 14:01:19 -05:00