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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-23 03:32:32 +00:00
Commit Graph

69 Commits

Author SHA1 Message Date
Thomas Harte
903a17ae11 Corrected typo and removed replication of what's already declared formally. 2017-08-16 14:53:03 -04:00
Thomas Harte
3947347d88 Introduces active input handling for the AY and uses it in the CPC to give proper, active keyboard input, rather than push-on-select, which was only ever a temporary hack. Also maps a few more keys for the Amstrad. 2017-08-15 22:47:17 -04:00
Thomas Harte
334872d374 Clarified, slightly. 2017-08-14 12:47:11 -04:00
Thomas Harte
7ea703f150 Started making provisions for a DMA-compatible implementation. Re: the CPC, it sounds like DMA acknowledge might be permanently wired, causing DMA mode seemingly to work from the 8272's point of view. 2017-08-14 08:38:00 -04:00
Thomas Harte
1d8edf58dd Ensured that a virtual destructor is declared, so that the various automatically-generated real constructors get in on the action. 2017-08-11 12:07:48 -04:00
Thomas Harte
4785e316ff Now with exposition. 2017-08-11 11:36:03 -04:00
Thomas Harte
44da9de5b0 Tweaked typing timing expectations. 2017-08-11 11:35:28 -04:00
Thomas Harte
570d25214e Made an initial attempt at typer support for the CPC. 2017-08-11 11:21:07 -04:00
Thomas Harte
cf810d8357 Minor: ensure the CRT is set to output as a monitor. 2017-08-10 14:42:47 -04:00
Thomas Harte
4961fda2a9 Ensured counter-intuitive CRTC writes get through, taking the opportunity to correct my handling of port IO in general: selecting multiple devices for input results in a logical AND (i.e. open collector mode), and both the CRTC and gate array will receive data from 'input's if applicable. 2017-08-10 12:39:19 -04:00
Thomas Harte
6a6e5ae79c Forced users of the 6845 to be explicit about which type. So far with no effect. 2017-08-10 12:28:57 -04:00
Thomas Harte
484524d781 Implements RAM paging. The 6128 is now emulated. 2017-08-08 16:01:56 -04:00
Thomas Harte
a7103f9333 Disks are now communicated to the 8272. Which is able to handle four of them. 2017-08-06 13:24:14 -04:00
Thomas Harte
29288b690e Switched disk controllers to be instantiated explicitly in terms of cycles, created an Amstrad-specific subclass of the 8272 to record the direct programmatic availability of all disk motors bundled together, and otherwise adjusted to ensure the thing is clocked and that the motor is enabled and disabled appropriately. The 8272 is also now formally a subclass of the incoming MDM controller. 2017-08-06 09:45:16 -04:00
Thomas Harte
3e984e75b6 Strung up an empty shell that eventually should contain the 8272, and added appropriate IO decoding to the Amstrad. 2017-08-05 19:45:52 -04:00
Thomas Harte
9e8645ca7a Fixed ROM paging port decoding. It should have been fd00 if completely decoded, not df00, but also shouldn't be completely decoded. 2017-08-05 19:24:03 -04:00
Thomas Harte
caf3ac0645 Sought: (i) to instruct the CPC that it should be a 664, not a 464, if given a disk image (at least until I have RAM paging implemented for a 6128); (ii) to support ROM selection within the CPC and allow paging in of AMSDOS. 2017-08-05 19:20:38 -04:00
Thomas Harte
4b19cf60df Added omitted semicolon. 2017-08-05 09:18:55 -04:00
Thomas Harte
b3788fed41 Fixed AY queuing behaviour as handled by the Amstrad. I think I need to come up with clearer semantics here. 2017-08-05 09:12:17 -04:00
Thomas Harte
a63aa80dc9 Merge branch 'master' of github.com:TomHarte/CLK 2017-08-04 16:51:52 -04:00
Thomas Harte
63f57c8c4f Adjusted visible portion of frame; completely empirical, as I'm chasing a machine that shipped with a monitor. 2017-08-04 16:51:46 -04:00
Thomas Harte
f075fea78c Introduces filtering of the CRTC's vsync signal into the gate array. 2017-08-04 16:36:55 -04:00
Thomas Harte
c0f0c68f4f Corrects quick-hack version of border drawing: the assumption that the colour must be the same over a plotted period. Also corrects my entry for colour 15. 2017-08-04 12:13:05 -04:00
Thomas Harte
d9097facf1 Found documentation that makes more sense, and in practice seems to be more correct: the test after vertical sync is for greater than 32, not less. Also I decided to chance my arm on counter reset also resetting interrupt request. The raster effects of Ghouls 'n' Ghosts is now pretty much correct but one line off. I think probably either something is off in my wait-two logic on the post-vsync timer event, or possibly the vsync bit exposed via the PPI doesn't mean exactly what I think it means. 2017-08-04 08:56:09 -04:00
Thomas Harte
b927500487 Clarified code a little, but this is mostly fiddling in the margins. 2017-08-03 22:00:30 -04:00
Thomas Harte
e71eabedf9 Fixed timer clearing tet. 2017-08-03 21:30:04 -04:00
Thomas Harte
33ed27c3ad Minor tidiness: included missing headers, and spaced out the ROM type and key lists for readability. 2017-08-03 12:45:42 -04:00
Thomas Harte
575b1dba75 Formally declared the ZX80/81 and Amstrad CPC as keyboard machines in their public interface. Which means not having to repeat the meaning of set_key_state and clear_all_keys. So: a minor DRY improvement. 2017-08-03 12:38:22 -04:00
Thomas Harte
42e70ef993 Adjusted slightly as per Z80 change, and to pull everything internally declared into the Amstrad CPC namespace. 2017-08-02 22:11:03 -04:00
Thomas Harte
d3bf8fa53b Upped the documentation. 2017-08-02 20:37:26 -04:00
Thomas Harte
f5e2dd410e Constrained output to the centre 90%. 2017-08-02 19:55:44 -04:00
Thomas Harte
e50adf1cc8 Were my TZX support up to it, this would likely be sufficient for tape emulation. 2017-08-02 13:50:14 -04:00
Thomas Harte
dcab10f53e Ensured the AY's async queue doesn't just fill and fill. 2017-08-02 07:38:35 -04:00
Thomas Harte
f602f9b6ec Adds an attempt to clock the AY. 2017-08-02 07:21:33 -04:00
Thomas Harte
4d5d5041df Attempted to ensure a clean startup. 2017-08-01 22:18:42 -04:00
Thomas Harte
587eb3a67c Factored interrupt counting out of the CRTCBusHandler. 2017-08-01 22:15:39 -04:00
Thomas Harte
8d39a20088 Added proper output of mode 3, were anything ever to try to use it. 2017-08-01 21:51:41 -04:00
Thomas Harte
4b6370eb86 Realised my colour error: mapping the ROM numbers as though they were the hardware numbers. Having fixed that, spotted that I was deserialising R and B the wrong way around and dividing by too much. Colours now appear to be correct. 2017-08-01 21:47:52 -04:00
Thomas Harte
c6e340a8a2 Wired up the vsync signal. Pen 15 no longer flashes like crazy. Still can't figure out why the palette is so askew; was looking for perhaps some sort of detection of a green screen rather than a colour one, but there's no obvious input for that. 2017-08-01 21:21:59 -04:00
Thomas Harte
31c7153301 Corrected bit to colour mapping for modes 0 and 1. The total palette is still way off but there's consistency between modes now. 2017-08-01 20:52:42 -04:00
Thomas Harte
7e04d00cc1 Fixed key values, causing the new set of keys to work, decreased quantity of output and ensured that pixels appear in modes 0 and 2. 2017-08-01 20:39:10 -04:00
Thomas Harte
eca9586a0f Fixed: input value is no longer overwritten by 0xff. The '0' key now works. 2017-08-01 20:19:02 -04:00
Thomas Harte
2e4577f741 Made a game attempt at implementing a (sticky) keyboard. No effect yet. 2017-08-01 17:52:05 -04:00
Thomas Harte
f5b278d683 Added enough stuff to put the emulated Amstrad CPC in a state of knowing whether its '0' key is pressed. 2017-08-01 17:31:56 -04:00
Thomas Harte
e6854ff8db Corrected typo: the input to an AY is BDIR, not BCDIR. 2017-08-01 17:06:57 -04:00
Thomas Harte
3b292273c7 Fixed: BC2 is always implicitly set. The machine is now periodically checking the AY's register 14 (i.e. the first input port), so probably there's enough here now to implement keyboard input. 2017-08-01 17:05:11 -04:00
Thomas Harte
cb732e5d5f Made an attempt to wire in an [unclocked] AY, in an endeavour to get to keyboard reading. 2017-08-01 17:01:58 -04:00
Thomas Harte
08ad35efd9 It's barely an implementation of the 8255, but ensured that data is bounced into the PortHandler, conveniently assuming the interaction mode used by the CPC. 2017-08-01 16:34:13 -04:00
Thomas Harte
58b98267fc Formally transferred ownership of PIO accesses to an incoming template, and decided to start being explicit about how to specify the interfaces and provide fallbacks for optional behaviour for the new, clean generation of interfaces. A full-project sweep will inevitably occur but I'll try to tie off this branch first. 2017-08-01 16:15:19 -04:00
Thomas Harte
a27946102a Took a shot at the interrupt counter. Attempts at keyboard reading now recur so it'll probably do for now. I think that next puts me into the realm of needing to implement the 8255. 2017-08-01 15:49:16 -04:00