Thomas Harte
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8827597363
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Messier and messier, but I've at least attempted to implement hardware attention acknowledge.
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2016-07-08 19:00:39 -04:00 |
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Thomas Harte
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9a08ef61cb
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Still fumbling in the margins: made an effort not to imply that the 1540 is forever reading syncs.
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2016-07-07 22:13:18 -04:00 |
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Thomas Harte
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199c0e27e0
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Mostly just random guesses now, to be honest. It's approaching the end of my window for the morning.
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2016-07-07 07:16:36 -04:00 |
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Thomas Harte
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81e6cc34e5
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Per the ROM disassembly, the Vic's VIA outputs are inverted for the benefit of the serial bus.
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2016-07-07 06:57:21 -04:00 |
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Thomas Harte
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c9479f923b
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The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive.
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2016-07-07 06:44:13 -04:00 |
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Thomas Harte
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dcb86a027a
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Okay, so the 1540 doesn't toggle the actual attention line. I don't know what it does yet but this helps.
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2016-07-06 22:31:14 -04:00 |
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Thomas Harte
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1baf21827c
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Since the ROM is well disassembled, let's actually try to be a 1541 first.
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2016-07-06 22:17:32 -04:00 |
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Thomas Harte
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f64cd8cfcb
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Quick fixes properly to declare the DriveVIA, to ensure its interrupts take effect, and to wire ATN IN to CA1 rather than CB2.
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2016-07-06 20:22:46 -04:00 |
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Thomas Harte
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428fcdb978
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Centralised and improved serial logging.
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2016-07-06 07:46:21 -04:00 |
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Thomas Harte
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8819711bc8
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Threw in the second VIA as a currently clearly incorrect thing.
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2016-07-05 22:22:09 -04:00 |
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Thomas Harte
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93c2bb80a2
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Improved a comment, added independent C[A/B]2 input mode.
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2016-07-05 21:11:51 -04:00 |
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Thomas Harte
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6c4fa4ec5d
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Improved commenting and initial state communication.
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2016-07-05 20:57:31 -04:00 |
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Thomas Harte
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1e6d90de17
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Made an attempt properly to deal with initial bus state.
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2016-07-05 20:52:33 -04:00 |
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Thomas Harte
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c3b7d24293
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It appears that the attention line is also wired to CB2. So the ball is back in the 6522's court.
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2016-07-05 19:19:46 -04:00 |
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Thomas Harte
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11fc43aa04
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Made an attempt to allow the 1540 to talk back to the Vic, and to receive interrupts. Also slightly disambiguated debugging logging.
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2016-07-05 19:12:43 -04:00 |
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Thomas Harte
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d16b79073e
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Further fleshing out: added a serial port for the serial bus.
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2016-07-05 17:27:02 -04:00 |
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Thomas Harte
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d1eea6943d
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Ensured the 1540 ROM gets installed, at least.
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2016-07-05 16:54:25 -04:00 |
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Thomas Harte
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86dabd007b
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Furthered fleshing out of the 1540. Though it doesn't yet receive a ROM so won't even attempt to do anything meaningful.
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2016-07-05 16:39:18 -04:00 |
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Thomas Harte
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a25fcc7190
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Made a first attempt at wiring back serial port input.
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2016-07-05 16:10:54 -04:00 |
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Thomas Harte
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d2cded7b59
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Attempted to separate out the concept of a serial port and a serial bus, since the bus may be shared, and to establish half duplex communications from the Vic.
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2016-07-05 14:55:20 -04:00 |
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Thomas Harte
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0d3d0fbe4d
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Created a namespace for Commodore and an empty container file for the 1540[/1] implementation.
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2016-07-05 13:28:27 -04:00 |
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