Thomas Harte
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17ffd604bf
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Made an attempt to get the Z80 at least as far as rejecting an opcode.
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2017-05-17 21:45:23 -04:00 |
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Thomas Harte
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1378ab7278
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Ensured initial program counter and stack pointer are correct for Zexall, fixed the Z80 to use a compile-time polymorphic call for bus access.
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2017-05-17 07:36:06 -04:00 |
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Thomas Harte
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87a021ec2d
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Made further attempt to get as fas as having the Z80 attempt to do something.
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2017-05-16 22:19:40 -04:00 |
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Thomas Harte
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7190f927b7
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Factored out the stuff that both all-RAM processors would share, rather than duplicating it.
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2017-05-16 21:28:17 -04:00 |
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Thomas Harte
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d559d8b901
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Continued edging towards getting the absolute basics of a testable Z80, for test-driven development. Corrected old-fashioned instance naming issues with the corresponding 6502 class and removed an unnecessary source file while at it.
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2017-05-16 21:19:17 -04:00 |
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Thomas Harte
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50bb4f0142
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There's finally a loop in here, at least.
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2017-05-15 22:25:52 -04:00 |
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Thomas Harte
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7da51602d5
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Moved flush, added run_for_cycles, which does nothing right now.
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2017-05-15 07:59:21 -04:00 |
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Thomas Harte
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5152517887
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Added the boilerplate stuff necessary to query registers.
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2017-05-15 07:55:53 -04:00 |
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Thomas Harte
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eb8a2de5d6
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Settled definitively on flush as more communicative than synchronise (and slightly more locale neutral); culled some more duplication from the Z80.
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2017-05-15 07:38:59 -04:00 |
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Thomas Harte
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f2a1a906ff
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Adapted what negligible amount there is of the z80 as per the new CPU namespace.
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2017-05-14 22:15:16 -04:00 |
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Thomas Harte
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0808e9b6fb
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Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
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2017-05-14 22:08:15 -04:00 |
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Thomas Harte
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b81a2cc273
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First tentative steps towards adding a Z80 implementation.
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2017-05-14 17:46:41 -04:00 |
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