Thomas Harte
c1bae49a92
Standardises on read and write for bus accesses.
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Logic being: name these things for the bus action they model, not the effect they have.
2020-01-05 13:40:02 -05:00
Thomas Harte
e4349f5e05
Slightly clarifies logic.
2020-01-04 21:32:34 -05:00
Thomas Harte
7b2777ac08
Sorts cases into order; adds copious audio mirrors.
2020-01-04 21:06:21 -05:00
Thomas Harte
0fbcbfc61b
Switches to more idiomatic address listing.
2020-01-04 20:35:47 -05:00
Thomas Harte
3ab4fb8c79
Enables an assumption of partial address decoding at the ACIA and PSG.
2020-01-04 17:27:55 -05:00
Thomas Harte
19ddfae6d6
Adds Joystick key code mode, ensures events aren't posted in interrogation mode.
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This should fix Turrican due to the latter change; I'm not aware of software that uses the former.
2020-01-04 09:45:59 -05:00
Thomas Harte
414b0cc234
Reintroduces sync write delay.
2020-01-02 23:36:11 -05:00
Thomas Harte
134e828336
Updates note to self.
2020-01-02 23:33:35 -05:00
Thomas Harte
455e831b87
Corrects bug whereby changing pixel mode mid-line will produce an improper amount of data.
2020-01-02 23:18:21 -05:00
Thomas Harte
42ccf48966
Judging by Pompey Pirates Menu 88, vsync should occur a line earlier, ending during line 0.
2020-01-02 20:16:28 -05:00
Thomas Harte
2f8078db22
Switches to should_log as a global when I'm hacking about.
2020-01-02 20:15:48 -05:00
Thomas Harte
23ed9ad2de
Corrects application of negative relative scale.
2020-01-01 13:22:21 -05:00
Thomas Harte
017681a97c
Now honours permitted mouse range.
2020-01-01 12:48:38 -05:00
Thomas Harte
90b899c00e
Attempts to implement absolute mouse positioning mode.
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Along with mouse direction.
2020-01-01 12:29:33 -05:00
Thomas Harte
c11fe25537
Merge branch 'master' into EnchantedWoods
2019-12-30 23:32:45 -05:00
Thomas Harte
0a12893d63
Shunts vsync back down to top of frame.
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It's guess after guess, basically.
2019-12-30 23:01:31 -05:00
Thomas Harte
8e777c299f
Switches to latching video interrupts until acknowledged.
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Seems to fix Cisco Heat, at least. I have no idea whether I'm latching the correct thing, whether IACK should clear both or only one, etc.
2019-12-30 23:00:55 -05:00
Thomas Harte
e23d1a2958
Restores vsync active.
2019-12-29 22:03:36 -05:00
Thomas Harte
6449403f6a
Corrects pending_events_ test for sequence points.
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Simplifies around as possible.
2019-12-29 21:53:45 -05:00
Thomas Harte
c8fe66092b
Attempts to correct insertion logic (and mostly bypasses it).
2019-12-29 21:42:41 -05:00
Thomas Harte
b33218c61e
Fixes reload test, which really needs to sense the CRT-headed vsync output.
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i.e. not the one heading back to the CPU.
2019-12-29 20:55:34 -05:00
Thomas Harte
8ce26e7182
Adds a delay on vsync visibility (i.e. as to generating an interrupt).
2019-12-29 19:03:08 -05:00
Thomas Harte
47068ee081
Ensures visible hsync end generates a sequence point.
2019-12-29 17:51:50 -05:00
Thomas Harte
214b6a254a
Adds a delay on visibility of the hsync signal, and a test on address reload.
2019-12-29 17:37:09 -05:00
Thomas Harte
93f6964d8a
Introduces some preliminary line length unit tests.
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Thereby fixes one potential issue with load_ toggling.
2019-12-28 22:50:34 -05:00
Thomas Harte
13f11e071a
Simplifies border colour change propagation.
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I'm not sure it was even technically correct as was.
2019-12-28 10:45:10 -05:00
Thomas Harte
f7825dd2a2
Pulls out address reload position as a separate constant.
2019-12-28 10:36:50 -05:00
Thomas Harte
a9d1f5d925
Pulls out address reload as something I can position independently.
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Sadly receding it by 3 did not have the effect I was hoping for, of receding Enchanted Land's first register tweaking.
2019-12-27 23:47:19 -05:00
Thomas Harte
2757e5d600
Removes untrue comment.
2019-12-27 22:51:11 -05:00
Thomas Harte
5026de9653
Rejigs the video stream to ensure shifter really is continuous.
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... and definitively to avoid potential buffer overruns. Or, at least, to have a mechanism in place definitively to avoid them. Which will be tested and debugged as necessary.
Also simplifies the colour burst and border/pixels selection logic.
2019-12-27 22:47:34 -05:00
Thomas Harte
5fa8e046d8
It's inaccurrate to call this _the_ shifter. So don't.
2019-12-27 19:03:10 -05:00
Thomas Harte
de43e86310
Permits Vic-20 memory to be specified in banks; adds recognition of TheC64-style file tags to specify them.
2019-12-26 22:49:48 -05:00
Thomas Harte
a9a92de954
Adds a bunch of shout-outs for unimplemented behaviour.
2019-12-25 15:32:33 -05:00
Thomas Harte
a8ba3607b7
Adds (and disables) a minor additional piece of logging.
2019-12-24 21:43:39 -05:00
Thomas Harte
5068328a15
Fixes debugging output.
2019-12-24 19:15:58 -05:00
Thomas Harte
b2bed82da6
Switches to standard logging.
2019-12-23 22:00:40 -05:00
Thomas Harte
0dae608da5
Embraces std::make_[unique/shared] in place of .reset(new .
2019-12-23 21:31:46 -05:00
Thomas Harte
5456a4a39d
Eliminates static where constexpra aren't class members; adds some if constexprs for clarity.
2019-12-22 13:42:24 -05:00
Thomas Harte
274867579b
Deploys constexpr as a stricter const.
2019-12-22 00:22:17 -05:00
Thomas Harte
05d77d3297
Also deploys make_unique/shared to avoid type repetition.
2019-12-21 23:52:04 -05:00
Thomas Harte
e5440a4146
Hacks in a colour burst.
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With a major flaw: it's implicit. I think I need a minor rethink of various components here.
2019-12-20 23:49:38 -05:00
Thomas Harte
47508d50a7
Wires through a composite video option for the ST.
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Which is great and all, except that I've not yet inserted a colour burst. So it's monochrome.
2019-12-20 20:49:14 -05:00
Thomas Harte
3d83f5ab49
Ensures a proper size handoff and implements a ripple feature I happened to find a forum post about.
2019-12-19 22:58:07 -05:00
Thomas Harte
0007dc23b3
Eliminates bit 0 of the DMA address.
2019-12-19 22:44:21 -05:00
Thomas Harte
ed7f171736
Moves address reload to end of vertical sync.
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I have no information as to when it should be, so this is as valid a guess as any other.
2019-12-19 22:20:43 -05:00
Thomas Harte
0e066f0f70
Removes 'done' TODO.
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For certain values of done.
2019-12-19 22:19:59 -05:00
Thomas Harte
d85ae21b2f
Adds an explicit declaration of chip type to all AY users.
2019-12-18 19:28:41 -05:00
Thomas Harte
c00ae7ce6a
Adds a one-cycle delay on frequency changes.
2019-12-13 19:57:54 -05:00
Thomas Harte
4bcf217324
Ensures delayed loading isn't interrupted by blank, hsync.
2019-12-12 23:20:28 -05:00
Thomas Harte
f6f2b4b90f
Removes double DE edge test.
2019-12-12 22:50:35 -05:00
