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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-29 12:50:28 +00:00
Commit Graph

63 Commits

Author SHA1 Message Date
Thomas Harte
94231ca3e3 Put word-sizing responsibility on the caller. 2022-08-10 16:41:45 -04:00
Thomas Harte
e2a8b26b57 Display properly from greater RAM sizes. 2022-08-10 16:36:11 -04:00
Thomas Harte
48afc54af6 Cuts down unused parameter warnings to just a few that may well indicate implementation errors. 2020-05-30 01:06:43 -04:00
Thomas Harte
512a52e88d Increases const correctness, marks some additional constructors as constexpr, switches std::atomic construction style. 2020-05-20 23:34:26 -04:00
Thomas Harte
ec6664f590 Takes steps to guarantee property naming; reintroduces Electron runtime options. 2020-03-17 23:52:55 -04:00
Thomas Harte
9ca2d8f9f2 Tried to be less lazy with lambda captures.
This is primarily defensive.
2020-02-14 23:39:08 -05:00
Thomas Harte
24340d1d4f Resolves fetch errors. 2020-02-09 17:04:49 -05:00
Thomas Harte
085529ed72 Makes the shifter behaviour conform to its documentation. 2020-02-02 17:26:39 -05:00
Thomas Harte
019474300d Centralises responsibility for picking irrelevant numbers for a computer-style monitor. 2020-01-30 23:26:02 -05:00
Thomas Harte
f3db1a0c60 Eliminates ad hoc scheduling for delayed DE -> LOAD. 2020-01-29 22:50:22 -05:00
Thomas Harte
ce28213a5e [Mostly] unifies deferral process. 2020-01-29 22:46:08 -05:00
Thomas Harte
f0a6e0f3d5 Splits out the queue management stuff from queue+action.
Temporarily breaks ST video in the endeavour.
2020-01-29 22:18:41 -05:00
Thomas Harte
0e29c6b0ab On further reflection, I think events should occur after the running period.
I'm testing this now for sanity in 2/4bpp mode.
2020-01-28 23:26:37 -05:00
Thomas Harte
c5edc879b6 Switches back to testing the monochrome monitor. 2020-01-28 22:12:57 -05:00
Thomas Harte
65309e60c4 Corrects sequence point generation by allowing for hsync_end != end of line. 2020-01-28 20:38:20 -05:00
Thomas Harte
2c0cab9e4d Adds line length latching as a line event. 2020-01-28 20:22:37 -05:00
Thomas Harte
b1ff031b54 Fixes runtime test. 2020-01-27 23:41:08 -05:00
Thomas Harte
7e8405e68a Makes 72Hz horizontal sync independently relocatable.
... and moves and shortens it, based on my guesswork as to requirements.
2020-01-27 23:40:01 -05:00
Thomas Harte
c8fd00217d Resolves loss of horizontal resolution in 1bpp mode. 2020-01-27 23:08:28 -05:00
Thomas Harte
9d340599a6 Towards ST 1bpp support: puts vsync in an appropriate location, starts experimenting with proper CRT timings. 2020-01-27 23:00:30 -05:00
Thomas Harte
a71c5946f0 Ensures proper manipulation of scan_statuses, leading to the correct result out of a CRTMachine.
Possibly with the exception of the TMS, as I appear to have uncovered an unrelated issue there.
2020-01-21 22:28:25 -05:00
Thomas Harte
d97a073d1b Adds the necessary routine for all machines to be able to respond to get_scan_status.
They all just as the CRT, as all are currently based on the CRT. Which doesn't currently know the total clock rate it would need to in order properly to scale the answer to the question. Further thought coming.
2020-01-20 21:45:10 -05:00
Thomas Harte
414b0cc234 Reintroduces sync write delay. 2020-01-02 23:36:11 -05:00
Thomas Harte
134e828336 Updates note to self. 2020-01-02 23:33:35 -05:00
Thomas Harte
455e831b87 Corrects bug whereby changing pixel mode mid-line will produce an improper amount of data. 2020-01-02 23:18:21 -05:00
Thomas Harte
42ccf48966 Judging by Pompey Pirates Menu 88, vsync should occur a line earlier, ending during line 0. 2020-01-02 20:16:28 -05:00
Thomas Harte
0a12893d63 Shunts vsync back down to top of frame.
It's guess after guess, basically.
2019-12-30 23:01:31 -05:00
Thomas Harte
e23d1a2958 Restores vsync active. 2019-12-29 22:03:36 -05:00
Thomas Harte
6449403f6a Corrects pending_events_ test for sequence points.
Simplifies around as possible.
2019-12-29 21:53:45 -05:00
Thomas Harte
8ce26e7182 Adds a delay on vsync visibility (i.e. as to generating an interrupt). 2019-12-29 19:03:08 -05:00
Thomas Harte
47068ee081 Ensures visible hsync end generates a sequence point. 2019-12-29 17:51:50 -05:00
Thomas Harte
214b6a254a Adds a delay on visibility of the hsync signal, and a test on address reload. 2019-12-29 17:37:09 -05:00
Thomas Harte
93f6964d8a Introduces some preliminary line length unit tests.
Thereby fixes one potential issue with load_ toggling.
2019-12-28 22:50:34 -05:00
Thomas Harte
13f11e071a Simplifies border colour change propagation.
I'm not sure it was even technically correct as was.
2019-12-28 10:45:10 -05:00
Thomas Harte
f7825dd2a2 Pulls out address reload position as a separate constant. 2019-12-28 10:36:50 -05:00
Thomas Harte
a9d1f5d925 Pulls out address reload as something I can position independently.
Sadly receding it by 3 did not have the effect I was hoping for, of receding Enchanted Land's first register tweaking.
2019-12-27 23:47:19 -05:00
Thomas Harte
2757e5d600 Removes untrue comment. 2019-12-27 22:51:11 -05:00
Thomas Harte
5026de9653 Rejigs the video stream to ensure shifter really is continuous.
... and definitively to avoid potential buffer overruns. Or, at least, to have a mechanism in place definitively to avoid them. Which will be tested and debugged as necessary.

Also simplifies the colour burst and border/pixels selection logic.
2019-12-27 22:47:34 -05:00
Thomas Harte
5fa8e046d8 It's inaccurrate to call this _the_ shifter. So don't. 2019-12-27 19:03:10 -05:00
Thomas Harte
274867579b Deploys constexpr as a stricter const. 2019-12-22 00:22:17 -05:00
Thomas Harte
e5440a4146 Hacks in a colour burst.
With a major flaw: it's implicit. I think I need a minor rethink of various components here.
2019-12-20 23:49:38 -05:00
Thomas Harte
47508d50a7 Wires through a composite video option for the ST.
Which is great and all, except that I've not yet inserted a colour burst. So it's monochrome.
2019-12-20 20:49:14 -05:00
Thomas Harte
ed7f171736 Moves address reload to end of vertical sync.
I have no information as to when it should be, so this is as valid a guess as any other.
2019-12-19 22:20:43 -05:00
Thomas Harte
c00ae7ce6a Adds a one-cycle delay on frequency changes. 2019-12-13 19:57:54 -05:00
Thomas Harte
4bcf217324 Ensures delayed loading isn't interrupted by blank, hsync. 2019-12-12 23:20:28 -05:00
Thomas Harte
f6f2b4b90f Removes double DE edge test. 2019-12-12 22:50:35 -05:00
Thomas Harte
95b5db4d87 Tweaks timings yet further, adds a FIFO reset.
The accuracy of this may require further research.
2019-12-11 23:22:20 -05:00
Thomas Harte
de4403e021 Corrects blank timing. 2019-12-10 22:17:57 -05:00
Thomas Harte
0a405d1c06 Introduces a latency between DE and load. 2019-12-10 21:24:15 -05:00
Thomas Harte
a7cfb840ef Adds but presently disables a diagnostic for border elimination. 2019-12-08 22:34:42 -05:00