6502/CLK
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14,193 Commits 5 Branches 152 Tags
edba0d94eb69e331f72047c8eb5fed281eacfccf
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1513 Commits
Author SHA1 Message Date
Thomas Harte edba0d94eb Reduce 446 failures to 296. 2026-03-25 21:35:06 -04:00
Thomas Harte 9a527b1025 Test, widely fail LIC tests. 2026-03-25 21:19:56 -04:00
Thomas Harte b140323ebf Add LIC to template parameters; incorrectly valued at present. 2026-03-25 21:03:30 -04:00
Thomas Harte 7b8b2fc0cb Extend definition of LIC. 2026-03-25 17:39:29 -04:00
Thomas Harte 05a85b6ba9 Resolve various compiler warnings: primarily ~'s promotion to int. 2026-03-25 13:57:32 -04:00
Thomas Harte 372893a05a Add support for passive NOP observation. 2026-03-25 09:44:15 -04:00
Thomas Harte 8926a669a8 Make duration freestanding, to guarantee its constant. 2026-03-23 12:42:42 -04:00
Thomas Harte 94552d7dee Lock in exception vector. 2026-03-22 18:14:37 -04:00
Thomas Harte 258afa077f Further simplify expression of conditions. 2026-03-21 11:29:08 -04:00
Thomas Harte 957fbcfa64 Post interrupt acknowledge on vector fetches. 2026-03-21 10:37:50 -04:00
Thomas Harte 0b1ca94aa5 After an extra cycle of thought, RTI is like the tail of RTS. 2026-03-21 10:24:10 -04:00
Thomas Harte b88269a937 Regularise condition order. 2026-03-21 10:23:13 -04:00
Thomas Harte 2a1d9bc8e4 Try: storage is in control register, but is not writeable. 2026-03-20 16:41:03 -04:00
Thomas Harte 3913a2c9d3 Switch comprehension of what combines to make IRQA and B. 2026-03-20 14:45:56 -04:00
Thomas Harte ed481cce90 Ensure all macros are undefined. 2026-03-19 18:23:24 -04:00
Thomas Harte 4f24bee12b Make fallthroughs explicit. 2026-03-19 12:32:01 -04:00
Thomas Harte b925783251 Round out indexed address calculation tests. 2026-03-19 10:00:01 -04:00
Thomas Harte 1a385810f7 Test interrupt timing. 2026-03-18 23:50:07 -04:00
Thomas Harte ab070e3bee Test/correct CWAI and SYNC. 2026-03-18 23:24:23 -04:00
Thomas Harte 76eb696baa Test and correct SWI[2/3] and RESET. 2026-03-18 23:07:02 -04:00
Thomas Harte 6481f50c53 Test and correct RTS and RTI. 2026-03-18 22:46:34 -04:00
Thomas Harte 990a90928f Test various inherents that don't touch the stack. 2026-03-18 22:28:39 -04:00
Thomas Harte 6e08bd7aa3 Test, fix BSRs. 2026-03-18 17:39:54 -04:00
Thomas Harte 333c50f5b1 Test and correct branches. 2026-03-18 17:35:55 -04:00
Thomas Harte 0c55aa53e9 Extended tests and corrections as far as JSR. 2026-03-18 17:16:55 -04:00
Thomas Harte 0ec7aa3280 Test pushes and pulls. 2026-03-18 11:57:17 -04:00
Thomas Harte 2489129e97 Test and verify first piece of timing: EXG. 2026-03-18 11:40:07 -04:00
Thomas Harte 6487e10e22 Fill in extension counts. 2026-03-18 11:31:09 -04:00
Thomas Harte 814b50ccbf Start to introduce costed performances. 2026-03-18 11:11:30 -04:00
Thomas Harte 3c6ba3ae9f Implement CWAI. 2026-03-17 17:58:41 -04:00
Thomas Harte f90910ea63 Implement SYNC. 2026-03-17 12:19:29 -04:00
Thomas Harte 3d22fe0d1b Attempt FIRQ, IRQ and NMI responses. 2026-03-17 11:35:41 -04:00
Thomas Harte 1f6f103346 Implement HALT. 2026-03-17 11:17:40 -04:00
Thomas Harte 14ed0e0ec7 Implement RESET. 2026-03-17 00:06:58 -04:00
Thomas Harte fbb24e04e0 Generalise extended addressing; get as much as possible from tests. 2026-03-16 23:58:41 -04:00
Thomas Harte 5e07672fa4 Start testing and simplify indexed address decoder. 2026-03-16 18:27:50 -04:00
Thomas Harte 873f10a0d8 Disambiguate PostincrementBy1 and Offset8bit. 2026-03-16 18:09:49 -04:00
Thomas Harte 948e49312b Attempt MRDY version of write. 2026-03-16 17:49:45 -04:00
Thomas Harte d787af89c5 Write ADDD result back. 2026-03-16 15:03:48 -04:00
Thomas Harte d4f89888c9 Fix ADC flags. 2026-03-16 14:48:23 -04:00
Thomas Harte 69823ac117 Correct various subtraction flags. 2026-03-16 14:43:11 -04:00
Thomas Harte da2f9aab1c Fix MUL flags. 2026-03-16 14:30:14 -04:00
Thomas Harte 38b00373c2 LEA operates differently than LD with regard to flags. 2026-03-16 12:28:11 -04:00
Thomas Harte 216d947e64 Add assert, continue filtering test set for sanity. 2026-03-16 12:13:09 -04:00
Thomas Harte 4aad105c54 Limit CC testing where helpful. 2026-03-16 11:29:02 -04:00
Thomas Harte e1b5c5b8da Ensure low DAA addition rolls over into high. 2026-03-16 11:18:37 -04:00
Thomas Harte 299d6bc562 Fix LBSR test. 2026-03-16 11:04:47 -04:00
Thomas Harte 84b5292f0a Don't let a JMP target set flags. 2026-03-16 11:00:22 -04:00
Thomas Harte ec1595a55c Fix LSL overflow. 2026-03-16 10:56:26 -04:00
Thomas Harte fb17692826 Test everything except illegal opcodes. 2026-03-16 10:49:20 -04:00