Thomas Harte
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de7218cdf0
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Added a lot of commenting to the CPU6502 definition, simplifying its construction. Added missing nullability modifier to CSElectron. Fixed bad-habit Objective-C style naming on the Electron's Interrupt enum.
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2016-01-20 21:55:38 -05:00 |
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Thomas Harte
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93f7df04a0
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Ensured correctly timed sampling of the interrupt line.
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2016-01-10 22:55:56 -05:00 |
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Thomas Harte
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ccf20299a3
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Made an attempt at getting some interrupts all up inside this thing.
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2016-01-10 19:06:46 -05:00 |
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Thomas Harte
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7341f5c341
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This is intended to be enough to start producing something of an output. But something's obviously still broken.
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2016-01-09 20:26:40 -05:00 |
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Thomas Harte
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bfd9957c81
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You now get an Electron only if you ask for a new file. That'll do for now while it's the only thing that one might want to start without supplying a file. The 6502 now starts from a defined point — being reset. The Electron is starting to grow the absolute most simple buds of its memory map.
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2016-01-06 21:09:49 -05:00 |
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Thomas Harte
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675070c5dd
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Very, _very_ minor: switched to normal C++ constructor syntax for simple variable initialisation.
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2015-12-06 16:53:37 -05:00 |
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Thomas Harte
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a693c081f8
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Switched on the appropriate compiler warnings re: signed comparisons and implicit conversions. Fixed all less-than-explicit calls.
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2015-08-16 16:08:29 -04:00 |
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Thomas Harte
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9ca57b80a7
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Minor steps to help with diagnostics; all commented out or merely to benefit with breakpoint placement.
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2015-08-13 08:43:10 +01:00 |
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Thomas Harte
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cc98534f94
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Added test for NOP, discovering the undocumented ones to be the incorrect length.
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2015-08-13 07:32:50 +01:00 |
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Thomas Harte
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dd0f17130a
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Found and fixed some timing errors in absolute indexed and in (indirect), y addressing modes: neither is able in write or read-modify-write modes to shave a cycle as then can when reading.
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2015-08-13 02:58:39 +01:00 |
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Thomas Harte
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975836c30f
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Added a quick snippet test, discovering that I've cut a cycle from read/modify/writes.
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2015-08-13 02:18:41 +01:00 |
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Thomas Harte
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503d684af0
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Added a couple of timing tests, both of which seem to pass for now.
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2015-08-13 01:55:23 +01:00 |
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Thomas Harte
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d19f8ed507
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Removed the implicit reset upon 6502 startup, adding a reset line. Hence all tests now pass again. Added an empty shell for timing tests, the all-RAM 6502 now counting bus cycles.
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2015-08-13 00:51:06 +01:00 |
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Thomas Harte
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c1d1fb65cb
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Made an attempt properly to emulate the RDY line and the Atari's use of it.
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2015-07-31 16:54:20 -04:00 |
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Thomas Harte
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53dd5c8f16
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Trying to fix my RDY line emulation. Switched to PAL timings, at least temporarily, since it's starting to make a difference.
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2015-07-31 16:44:53 -04:00 |
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Thomas Harte
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cd0a62d21e
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With a slight tweak to the informal protocol used for 6502 memory access cycles, ensured the wait strobe actually halts the CPU, to give a more accurate linking of machine time to real time.
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2015-07-26 15:55:19 -04:00 |
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Thomas Harte
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6252f6030f
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Switched to idiomatic source name, ensured latest project name is in all appropriate header places, threw texture coordinates slightly into the shader mix.
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2015-07-26 15:25:11 -04:00 |
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Thomas Harte
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6558ae1425
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Imported what little I have so far in the way of a memory-access cycle complete 6502 and just enough of a pretend Atari 2600 on top to be able to see some playfields in ASCII art.
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2015-07-16 19:56:02 -04:00 |
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