Thomas Harte
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fab064641f
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Add Move[to/from][SR/CCR/USP] tests, correct decodings.
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2022-04-20 07:59:13 -04:00 |
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Thomas Harte
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cc69d01bdc
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Strip dead code.
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2022-04-19 20:41:39 -04:00 |
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Thomas Harte
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461a95d7ff
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Introduce missing register numbers for PEA, and elsewhere.
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2022-04-19 20:39:01 -04:00 |
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Thomas Harte
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316e9681cc
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Weed out false PEAs.
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2022-04-19 20:34:08 -04:00 |
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Thomas Harte
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4181313cc6
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Correct decoding of SWAP.
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2022-04-19 20:28:00 -04:00 |
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Thomas Harte
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aa1665acce
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Fix LEA transcription problems.
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2022-04-19 20:24:03 -04:00 |
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Thomas Harte
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6aabc5e7b0
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Test LEA, PEA, add name for MOVEq.
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2022-04-19 19:45:51 -04:00 |
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Thomas Harte
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343a8e0192
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Resolve wrong-headed mapping of LEA to MOVEAl.
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2022-04-19 19:36:21 -04:00 |
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Thomas Harte
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2707887a65
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Indicate MOVEAs.
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2022-04-19 17:17:19 -04:00 |
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Thomas Harte
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ef87d09cfa
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Clear up MOVEs, fail on MOVEAs.
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2022-04-19 17:13:23 -04:00 |
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Thomas Harte
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d21c67f237
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Don't permit byte move from address register.
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2022-04-19 16:49:26 -04:00 |
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Thomas Harte
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de0432b317
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Include register numbers in MOVEs.
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2022-04-19 16:34:22 -04:00 |
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Thomas Harte
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de40fed248
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Test MOVEs and add operand validation.
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2022-04-19 16:31:03 -04:00 |
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Thomas Harte
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76d7e0e1f8
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Test and correct SUBs.
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2022-04-19 16:27:20 -04:00 |
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Thomas Harte
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bfa551ec08
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Correct ADDX and SUBX listings.
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2022-04-19 16:21:40 -04:00 |
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Thomas Harte
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740e564bc7
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Improve validation, add all ADDs.
It now looks like probably the ADDXs in the JSON are incorrect.
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2022-04-19 14:45:15 -04:00 |
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Thomas Harte
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1f585d67b6
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ADDA: correct decoding, add validation.
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2022-04-19 14:43:01 -04:00 |
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Thomas Harte
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5b22e94a4b
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Map invalid reg+mode combinations to AddressingMode::None; add validation of ADDs and decoding of ADDX.
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2022-04-19 14:36:36 -04:00 |
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Thomas Harte
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7749aef6b6
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Improve const correctness.
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2022-04-19 14:35:40 -04:00 |
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Thomas Harte
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5de8fb0d08
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Disallow four illegal NBCD addressing modes.
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2022-04-19 09:59:02 -04:00 |
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Thomas Harte
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19f7335926
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Add post validation step.
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2022-04-19 09:44:02 -04:00 |
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Thomas Harte
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9b61830a55
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Add ADD.b as a note to self that .q decoding is also required.
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2022-04-19 08:44:44 -04:00 |
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Thomas Harte
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99f4cd867d
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Decode the two EXTs.
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2022-04-19 08:42:17 -04:00 |
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Thomas Harte
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f29fec33a2
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Eliminate mismatches due to unsupported addressing modes.
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2022-04-19 08:37:53 -04:00 |
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Thomas Harte
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93fe3459fd
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The quick value won't always fit in reg; turf the problem elsewhere.
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2022-04-19 08:37:35 -04:00 |
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Thomas Harte
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1abd3bd7f3
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Decode SWAP.
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2022-04-19 08:37:13 -04:00 |
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Thomas Harte
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5509f20025
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Fix MOVEfrom/toSR and NBCD listings.
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2022-04-19 08:07:34 -04:00 |
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Thomas Harte
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fc4fd41be4
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Reorder from most specific to least.
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2022-04-19 08:00:52 -04:00 |
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Thomas Harte
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3ffca20001
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Uncover various discrepancies with NBCD.
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2022-04-19 07:15:54 -04:00 |
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Thomas Harte
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7c29305788
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Test all ABCDs.
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2022-04-18 20:00:39 -04:00 |
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Thomas Harte
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41fb18e573
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Add 68k decoder to SDL build.
... and therefore to automated compilation testing.
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2022-04-18 14:43:41 -04:00 |
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Thomas Harte
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e4c6251ef5
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Express the BSR/Bcc.l test properly.
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2022-04-18 14:42:31 -04:00 |
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Thomas Harte
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7aa250eaf7
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Advances to hitting the same absent/present mapping as the old decoder.
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2022-04-18 14:41:26 -04:00 |
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Thomas Harte
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ff380b686a
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Decode MOVEq.
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2022-04-18 09:12:45 -04:00 |
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Thomas Harte
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d2452f4b68
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Fix SUBQ ExtendedOperation mappings.
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2022-04-18 09:08:49 -04:00 |
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Thomas Harte
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deb9c32a38
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Add missing Sccs.
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2022-04-18 09:04:17 -04:00 |
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Thomas Harte
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440f45b996
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Attempt decoding and disambiguation of Scc, DBcc, Bcc and BSR.
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2022-04-18 08:55:46 -04:00 |
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Thomas Harte
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7d64c4ec66
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Add STOP.
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2022-04-18 08:29:10 -04:00 |
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Thomas Harte
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7fe0d530c1
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Add a decoder for TRAP.
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2022-04-18 08:05:33 -04:00 |
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Thomas Harte
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c944767554
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Better document decoding patterns, add LEA and CHK.
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2022-04-18 08:00:43 -04:00 |
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Thomas Harte
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fde5a1c507
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Ensure ADDI, SUBI, etc, provide an operation.
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2022-04-18 07:42:30 -04:00 |
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Thomas Harte
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0fbfb41fa8
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Expand on none-matching text.
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2022-04-18 07:42:14 -04:00 |
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Thomas Harte
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1991ed0804
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Introduce failing [partial-]test of new 68000 decoder.
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2022-04-18 07:23:25 -04:00 |
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Thomas Harte
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e782b92a80
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Add exposition.
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2022-04-17 19:56:39 -04:00 |
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Thomas Harte
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07635ea2be
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Add register names, Q values.
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2022-04-17 19:46:21 -04:00 |
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Thomas Harte
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1916bd3bd0
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Import a first effort at listing all 68000 instruction specs.
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2022-04-17 07:57:59 -04:00 |
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Thomas Harte
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4eb752b000
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Even out tabs.
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2022-04-15 20:41:39 -04:00 |
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Thomas Harte
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bfb29a58f3
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Take another crack at neatness; make LEA overt.
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2022-04-15 20:33:59 -04:00 |
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Thomas Harte
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f86e455a87
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Advance permissively through the 4xxx page to LEA.
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2022-04-15 16:01:33 -04:00 |
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Thomas Harte
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faa35fe9fc
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Decode MOVE and the fixed 0x4xxx set.
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2022-04-15 15:40:31 -04:00 |
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