Thomas Harte
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b3788fed41
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Fixed AY queuing behaviour as handled by the Amstrad. I think I need to come up with clearer semantics here.
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2017-08-05 09:12:17 -04:00 |
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Thomas Harte
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b999c1d8aa
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Merge branch 'FilteredSync'
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2017-08-04 16:52:14 -04:00 |
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Thomas Harte
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a63aa80dc9
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Merge branch 'master' of github.com:TomHarte/CLK
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2017-08-04 16:51:52 -04:00 |
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Thomas Harte
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63f57c8c4f
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Adjusted visible portion of frame; completely empirical, as I'm chasing a machine that shipped with a monitor.
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2017-08-04 16:51:46 -04:00 |
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Thomas Harte
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7e6a6365c9
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Adjusted visible portion of frame; completely empirical, as I'm chasing a machine that shipped with a monitor.
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2017-08-04 16:50:58 -04:00 |
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Thomas Harte
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3dbf26ac49
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Merge pull request #175 from TomHarte/FilteredSync
Introduces filtering of the CRTC's hsync signal into the gate array.
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2017-08-04 16:38:52 -04:00 |
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Thomas Harte
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f075fea78c
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Introduces filtering of the CRTC's vsync signal into the gate array.
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2017-08-04 16:36:55 -04:00 |
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Thomas Harte
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cc8380c286
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Merge pull request #174 from TomHarte/ProperBorder
Removes quick-hack solution for border drawing
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2017-08-04 12:15:22 -04:00 |
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Thomas Harte
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c0f0c68f4f
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Corrects quick-hack version of border drawing: the assumption that the colour must be the same over a plotted period. Also corrects my entry for colour 15.
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2017-08-04 12:13:05 -04:00 |
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Thomas Harte
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c2bb019381
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Merge pull request #173 from TomHarte/TimingFixes
Corrects two misimplementations of the CPC's interrupt counter
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2017-08-04 09:06:42 -04:00 |
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Thomas Harte
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26ce6cdab2
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Permitted register 3 to dictate vertical sync length.
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2017-08-04 08:56:36 -04:00 |
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Thomas Harte
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d9097facf1
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Found documentation that makes more sense, and in practice seems to be more correct: the test after vertical sync is for greater than 32, not less. Also I decided to chance my arm on counter reset also resetting interrupt request. The raster effects of Ghouls 'n' Ghosts is now pretty much correct but one line off. I think probably either something is off in my wait-two logic on the post-vsync timer event, or possibly the vsync bit exposed via the PPI doesn't mean exactly what I think it means.
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2017-08-04 08:56:09 -04:00 |
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Thomas Harte
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b927500487
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Clarified code a little, but this is mostly fiddling in the margins.
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2017-08-03 22:00:30 -04:00 |
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Thomas Harte
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e71eabedf9
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Fixed timer clearing tet.
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2017-08-03 21:30:04 -04:00 |
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Thomas Harte
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33ed27c3ad
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Minor tidiness: included missing headers, and spaced out the ROM type and key lists for readability.
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2017-08-03 12:45:42 -04:00 |
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Thomas Harte
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45cbab6751
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Merge pull request #172 from TomHarte/KeyboardMachines
Publicly declares the ZX80/81 and Amstrad CPC as keyboard machines
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2017-08-03 12:39:22 -04:00 |
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Thomas Harte
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a7b74d6164
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Merge pull request #171 from TomHarte/EverMoreTZX
Further expands the implemented subset of the TZX file format
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2017-08-03 12:38:44 -04:00 |
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Thomas Harte
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575b1dba75
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Formally declared the ZX80/81 and Amstrad CPC as keyboard machines in their public interface. Which means not having to repeat the meaning of set_key_state and clear_all_keys. So: a minor DRY improvement.
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2017-08-03 12:38:22 -04:00 |
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Thomas Harte
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a3b16b6dfa
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Further beefs up the list of chunks that this TZX parser can either comprehend or skip.
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2017-08-03 12:13:41 -04:00 |
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Thomas Harte
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c8f4de6f11
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Merge pull request #170 from TomHarte/KeyboardCraziness
Separates knowing the mapping from ASCII to machine keys from the act of typing them
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2017-08-03 11:53:42 -04:00 |
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Thomas Harte
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bbb17acf3a
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Expanded interface so that an external machine caller can request a string be typed without any knowledge of whatever it intends to do re: CharacterMappers. Which is immediately useful in paste functionality.
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2017-08-03 11:50:50 -04:00 |
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Thomas Harte
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ad3a98387f
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Within the Typer framework: hatched out CharacterMapper as a distinct thing from the target for keypresses, better to formalise responsibility but also to make it easy cleanly to sever that stuff into its own little part.
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2017-08-03 11:42:31 -04:00 |
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Thomas Harte
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985fbf59c2
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Merge pull request #169 from TomHarte/Z80HasA
Converts the Z80 into a BusAdaptor-type component
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2017-08-02 22:42:49 -04:00 |
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Thomas Harte
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2f2071be8a
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These should actually both be in the public header, as the types are used in an exposed method.
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2017-08-02 22:18:30 -04:00 |
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Thomas Harte
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6d510e4e70
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Made it no longer public knowledge that any sort of Typer is involved in being a ZX80/81.
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2017-08-02 22:17:22 -04:00 |
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Thomas Harte
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8e0736fbe6
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Reinstated typing ability, albeit with an ugly inline insertion. But I think I can defer dealing with typers to another pull request. The whole issue of keyboard mapping probably needs reappraisal.
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2017-08-02 22:16:09 -04:00 |
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Thomas Harte
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681d1e2f8d
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Breaking its typer for now, adapted the ZX80/81 to having a Z80, not being one.
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2017-08-02 22:12:59 -04:00 |
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Thomas Harte
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42e70ef993
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Adjusted slightly as per Z80 change, and to pull everything internally declared into the Amstrad CPC namespace.
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2017-08-02 22:11:03 -04:00 |
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Thomas Harte
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039811ce6a
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Switched the Z80 to being something a machine has, not something a machine is.
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2017-08-02 22:09:59 -04:00 |
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Thomas Harte
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a54ccd1969
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Merge pull request #168 from TomHarte/CPC
Adds an initial Amstrad CPC 464 emuation
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2017-08-02 20:50:02 -04:00 |
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Thomas Harte
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707821ca55
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Added the normal readme to explain what's omitted here.
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2017-08-02 20:45:14 -04:00 |
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Thomas Harte
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d3bf8fa53b
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Upped the documentation.
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2017-08-02 20:37:26 -04:00 |
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Thomas Harte
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f5e2dd410e
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Constrained output to the centre 90%.
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2017-08-02 19:55:44 -04:00 |
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Thomas Harte
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3ca9c38777
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Attempted to move to more accurate bus reading — if control lines are set then all subsequent data inputs should act according to the current control lines; changes to port input should be reflected live upon readings, etc.
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2017-08-02 19:45:58 -04:00 |
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Thomas Harte
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2d2cefb0b0
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Adjusted factoring to introduce support for block 10.
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2017-08-02 14:36:47 -04:00 |
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Thomas Harte
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2fd071e45d
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Made an honest attempt at outputting turbo speed data block data. The CPC now at least starts to load.
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2017-08-02 14:24:34 -04:00 |
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Thomas Harte
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d7a5c3f49a
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Added support for the ID 20 block and fixed a minor error in my skip-the-contents version of block 11: length is three bytes long, not two. This gives me enough structure properly to get to the end of my current test CDT, albeit without making any of the noises.
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2017-08-02 14:12:34 -04:00 |
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Thomas Harte
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819761f9fb
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Fixed another uninitialised pointer.
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2017-08-02 13:56:35 -04:00 |
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Thomas Harte
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e50adf1cc8
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Were my TZX support up to it, this would likely be sufficient for tape emulation.
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2017-08-02 13:50:14 -04:00 |
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Thomas Harte
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dcab10f53e
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Ensured the AY's async queue doesn't just fill and fill.
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2017-08-02 07:38:35 -04:00 |
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Thomas Harte
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633d8965e2
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Removed accidental logging commit.
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2017-08-02 07:38:14 -04:00 |
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Thomas Harte
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f602f9b6ec
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Adds an attempt to clock the AY.
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2017-08-02 07:21:33 -04:00 |
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Thomas Harte
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f7e66dea61
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Added a compound divide and convert.
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2017-08-02 07:21:21 -04:00 |
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Thomas Harte
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bda9441620
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Made an attempt to clock the AY.
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2017-08-02 07:20:59 -04:00 |
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Thomas Harte
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4d5d5041df
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Attempted to ensure a clean startup.
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2017-08-01 22:18:42 -04:00 |
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Thomas Harte
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587eb3a67c
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Factored interrupt counting out of the CRTCBusHandler.
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2017-08-01 22:15:39 -04:00 |
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Thomas Harte
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6ca07f1e28
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I guess it might end up living somewhere else, but introduced a header with the compiler-specific stuff to allow me to force things inline.
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2017-08-01 22:04:58 -04:00 |
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Thomas Harte
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8d39a20088
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Added proper output of mode 3, were anything ever to try to use it.
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2017-08-01 21:51:41 -04:00 |
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Thomas Harte
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4b6370eb86
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Realised my colour error: mapping the ROM numbers as though they were the hardware numbers. Having fixed that, spotted that I was deserialising R and B the wrong way around and dividing by too much. Colours now appear to be correct.
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2017-08-01 21:47:52 -04:00 |
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Thomas Harte
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c6e340a8a2
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Wired up the vsync signal. Pen 15 no longer flashes like crazy. Still can't figure out why the palette is so askew; was looking for perhaps some sort of detection of a green screen rather than a colour one, but there's no obvious input for that.
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2017-08-01 21:21:59 -04:00 |
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