240 Commits

Author	SHA1	Message	Date
Thomas Harte	18744cd98b	Slightly updated comments, switched to 1540 ROM so as very slightly to improve loading time.	2016-08-01 04:37:30 -04:00
Thomas Harte	b43a7381ae	Fixed framing and first-byte-after-sync signalling. Hacked together as parts of it are, loading now appears to work!	2016-08-01 04:25:11 -04:00
Thomas Harte	41893b5ef6	Put in the absolute minimum logic for drive motor emulation. Drive appears to be attempting head steps.	2016-07-31 19:38:51 -04:00
Thomas Harte	740ea0b7e2	Added overflow-flag setting logic and ensured disk ROM gets through regardless of ROM/disk installation order.	2016-07-31 19:33:18 -04:00
Thomas Harte	0945049cd3	Made attempt to connect sync detect and then apply appropriate windowing, posting bytes to the appropriate place.	2016-07-31 18:29:44 -04:00
Thomas Harte	198fbbedc7	Reeled back all appropriate pieces of caveman debugging.	2016-07-31 13:42:34 -04:00
Thomas Harte	2332f72875	Formalised clock-rate multiplication within disk drives, discovered that the stepper didn't have ideal behaviour for my timed event loop and hence nailed down the semantics a ilttle more. ... (obiter: the 1540 now appears to discern the correct sequence of bits. Framing is off in my test printfs but that's neither here nor there).	2016-07-31 13:32:30 -04:00
Thomas Harte	8f62211f5e	Wired up the 1540 as a PLL delegate. Which prima facie means it should start receiving a bit stream. Except that I clearly have something in the timing way off — either my flux transitions are far too short or I need to significantly increase the clock rate on the PLL.	2016-07-29 12:08:18 -04:00
Thomas Harte	89a1881fef	Started turning the 1540 into an actual disk drive.	2016-07-29 11:03:09 -04:00
Thomas Harte	ada2f073e0	Completed handing of the disk all the way to the 1540.	2016-07-10 16:24:46 -04:00
Thomas Harte	6cfc514c2d	Made the rote changes necessary to attempt to open and to supply a G64 to the Vic.	2016-07-10 12:57:17 -04:00
Thomas Harte	4ca6883f7c	Disabled attachment of a 1540 again, as I probably need to move to opening an actual disk image next.	2016-07-10 08:03:36 -04:00
Thomas Harte	824d9ea92b	Added further comments.	2016-07-10 08:01:16 -04:00
Thomas Harte	d8334edf4a	Started trying to clean up, including commuting the C1540 source file name to match its class name but mainly by adding documentation.	2016-07-10 07:46:20 -04:00
Thomas Harte	c0ab45a73d	Disabled a bunch of the caveman debug logging.	2016-07-09 22:29:11 -04:00
Thomas Harte	f589d639db	Okay, so it seems that sync also works the other way around.	2016-07-09 22:25:44 -04:00
Thomas Harte	693c8b2438	After all that, it seems likely that inputs just aren't inverted for the Vic.	2016-07-09 20:03:38 -04:00
Thomas Harte	656cd211d7	Was transmitting bit levels backwards (probably?); 1540 now acknowledges byte received.	2016-07-09 18:06:49 -04:00
Thomas Harte	7cc4bf3fe7	Hit and hope is getting me nowhere. Time to unit test this thing.	2016-07-09 15:40:25 -04:00
Thomas Harte	8827597363	Messier and messier, but I've at least attempted to implement hardware attention acknowledge.	2016-07-08 19:00:39 -04:00
Thomas Harte	9a08ef61cb	Still fumbling in the margins: made an effort not to imply that the 1540 is forever reading syncs.	2016-07-07 22:13:18 -04:00
Thomas Harte	199c0e27e0	Mostly just random guesses now, to be honest. It's approaching the end of my window for the morning.	2016-07-07 07:16:36 -04:00
Thomas Harte	81e6cc34e5	Per the ROM disassembly, the Vic's VIA outputs are inverted for the benefit of the serial bus.	2016-07-07 06:57:21 -04:00
Thomas Harte	c9479f923b	The inversion of truth was clearly just a problematic API. Got explicit. LineLevel might need to become more pervasive.	2016-07-07 06:44:13 -04:00
Thomas Harte	dcb86a027a	Okay, so the 1540 doesn't toggle the actual attention line. I don't know what it does yet but this helps.	2016-07-06 22:31:14 -04:00
Thomas Harte	1baf21827c	Since the ROM is well disassembled, let's actually try to be a 1541 first.	2016-07-06 22:17:32 -04:00
Thomas Harte	f64cd8cfcb	Quick fixes properly to declare the DriveVIA, to ensure its interrupts take effect, and to wire ATN IN to CA1 rather than CB2.	2016-07-06 20:22:46 -04:00
Thomas Harte	428fcdb978	Centralised and improved serial logging.	2016-07-06 07:46:21 -04:00
Thomas Harte	8819711bc8	Threw in the second VIA as a currently clearly incorrect thing.	2016-07-05 22:22:09 -04:00
Thomas Harte	93c2bb80a2	Improved a comment, added independent C[A/B]2 input mode.	2016-07-05 21:11:51 -04:00
Thomas Harte	6c4fa4ec5d	Improved commenting and initial state communication.	2016-07-05 20:57:31 -04:00
Thomas Harte	1e6d90de17	Made an attempt properly to deal with initial bus state.	2016-07-05 20:52:33 -04:00
Thomas Harte	c3b7d24293	It appears that the attention line is also wired to CB2. So the ball is back in the 6522's court.	2016-07-05 19:19:46 -04:00
Thomas Harte	11fc43aa04	Made an attempt to allow the 1540 to talk back to the Vic, and to receive interrupts. Also slightly disambiguated debugging logging.	2016-07-05 19:12:43 -04:00
Thomas Harte	d16b79073e	Further fleshing out: added a serial port for the serial bus.	2016-07-05 17:27:02 -04:00
Thomas Harte	d1eea6943d	Ensured the 1540 ROM gets installed, at least.	2016-07-05 16:54:25 -04:00
Thomas Harte	86dabd007b	Furthered fleshing out of the 1540. Though it doesn't yet receive a ROM so won't even attempt to do anything meaningful.	2016-07-05 16:39:18 -04:00
Thomas Harte	a25fcc7190	Made a first attempt at wiring back serial port input.	2016-07-05 16:10:54 -04:00
Thomas Harte	d2cded7b59	Attempted to separate out the concept of a serial port and a serial bus, since the bus may be shared, and to establish half duplex communications from the Vic.	2016-07-05 14:55:20 -04:00
Thomas Harte	0d3d0fbe4d	Created a namespace for Commodore and an empty container file for the 1540[/1] implementation.	2016-07-05 13:28:27 -04:00