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36d9c40d7b
Author | SHA1 | Date |
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Thomas Harte | 36d9c40d7b | |
Thomas Harte | becb6ce2e0 |
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@ -337,7 +337,7 @@ struct Executor {
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uint32_t value = 0;
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uint32_t value = 0;
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if constexpr (flags.transfer_byte()) {
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if constexpr (flags.transfer_byte()) {
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uint8_t target;
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uint8_t target = 0; // Value should never be used; this avoids a spurious GCC warning.
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did_read = bus.template read<uint8_t>(address, target, registers_.mode(), trans);
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did_read = bus.template read<uint8_t>(address, target, registers_.mode(), trans);
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if(did_read) {
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if(did_read) {
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value = target;
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value = target;
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@ -548,7 +548,7 @@ class ConcreteMachine:
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}
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}
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uint32_t advance_pipeline(uint32_t pc) {
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uint32_t advance_pipeline(uint32_t pc) {
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uint32_t instruction;
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uint32_t instruction = 0; // Value should never be used; this avoids a spurious GCC warning.
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const bool did_read = executor_.bus.read(pc, instruction, executor_.registers().mode(), false);
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const bool did_read = executor_.bus.read(pc, instruction, executor_.registers().mode(), false);
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return pipeline_.exchange(
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return pipeline_.exchange(
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did_read ? instruction : Pipeline::SWI,
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did_read ? instruction : Pipeline::SWI,
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@ -1869,6 +1869,7 @@ void Processor<BusHandler, dtack_is_implicit, permit_overrun, signal_will_perfor
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SetupDataAccess(0, Operation::SelectWord);
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SetupDataAccess(0, Operation::SelectWord);
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MoveToStateSpecific(StoreOperand_l);
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MoveToStateSpecific(StoreOperand_l);
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default: // Convince GCC that nothing here is amiss.
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case InstructionSet::M68k::DataSize::Word:
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case InstructionSet::M68k::DataSize::Word:
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SetupDataAccess(0, Operation::SelectWord);
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SetupDataAccess(0, Operation::SelectWord);
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MoveToStateSpecific(StoreOperand_bw);
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MoveToStateSpecific(StoreOperand_bw);
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