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mirror of https://github.com/TomHarte/CLK.git synced 2024-07-06 01:28:57 +00:00
CLK/Processors
Thomas Harte 0471decfc8 Implement the complete set of fetch addressing modes.
Subject to observations: (1) MOVE uses slightly custom versions of many of these for its stores; and (2) PEA and LEA need to do the calculation but not the read, so some of this will be duplicated further. It's either that or include greater conditionality on the path.
2022-05-19 15:03:22 -04:00
..
6502 Relocated RegisterSizes to Numeric. 2022-04-28 15:10:08 -04:00
6502Esque Reshuffles enum to make macro tests marginally easier. 2020-11-03 20:17:09 -05:00
65816 Relocated RegisterSizes to Numeric. 2022-04-28 15:10:08 -04:00
68000 Remove add_pc and decline_branch in favour of operation-specific signals. 2022-05-09 16:19:25 -04:00
68000Mk2 Implement the complete set of fetch addressing modes. 2022-05-19 15:03:22 -04:00
Z80 Relocated RegisterSizes to Numeric. 2022-04-28 15:10:08 -04:00
AllRAMProcessor.cpp Ups the 65816 test machine to a full 16mb RAM. 2020-10-11 21:18:01 -04:00
AllRAMProcessor.hpp Ups the 65816 test machine to a full 16mb RAM. 2020-10-11 21:18:01 -04:00