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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-23 18:31:53 +00:00
CLK/Components
2017-08-07 12:37:22 -04:00
..
1770 Fixed WAIT_FOR_TIME macro. 2017-08-06 12:08:54 -04:00
6522
6532
6560
6845 Permitted register 3 to dictate vertical sync length. 2017-08-04 08:56:36 -04:00
8255 Fixed: of course this should take a reference to an existing port handler rather than hatching its own; otherwise additional communication with a port handler by an i8255 owner doesn't work as intended. 2017-08-01 17:01:20 -04:00
8272 Prevented the 8272 from overreading ID fields (and, by doing so, overrunning its internal buffer). Exposed the MFMController's CRC generator for inspection. 2017-08-07 12:37:22 -04:00
AY38910 Attempted to move to more accurate bus reading — if control lines are set then all subsequent data inputs should act according to the current control lines; changes to port input should be reflected live upon readings, etc. 2017-08-02 19:45:58 -04:00